About the job
Annapurna Labs, an AWS organization with development centers in the U.S. and Israel, builds custom silicon and software for AWS customers. Our team combines cloud-scale innovation with world-class expertise across silicon engineering, hardware design, verification, software, and operations to tackle technical challenges that have never been seen before.
Join our Silicon Validation team to validate next-generation machine learning accelerators that power AWS's cloud computing infrastructure. You'll work in a fast-paced, startup-like environment alongside some of the brightest minds in the industry on cutting-edge, internet-scale technology that directly impacts how customers use Machine Learning acceleration. We are changing the landscape of cloud infrastructure by accelerating the development of custom silicon by moving beyond traditional partnerships to dominate in AI training and inference
Your work will span validation of the complete vertical stack—silicon, PCB, high-speed components (HBM, PCIe, chip-to-chip), inter-system connections, and system-to-system interfaces. You'll dive deep into new technology hardware components and scaling technologies that power our Machine Learning boards and servers at scale, ensuring every component of our hardware and software comes together into products our customers rely on.
Responsibilities
Developing comprehensive validation strategies and detailed test plans covering functional, performance, power, and stress testing from silicon bring-up to product release
Executing complex test plans from RTL simulation and emulation environments through physical silicon validation
Conducting hands-on silicon bring-up and debug in the lab using oscilloscopes, logic analyzers, and protocol analyzers
Validating ML accelerator performance, accuracy, and reliability using real-world neural network workloads
Building test infrastructure, CI/CD, and automated regression frameworks to enable efficient validation at scale
Collaborating across architecture, design, firmware, and software teams to triage failures and drive root cause analysis to closure
Reviewing test results, identifying patterns, and providing feedback to improve design quality and validation coverage
Supporting production systems in AWS data centers and addressing field issues as they arise
Qualifications
Minimum
3+ years of non-internship professional software development experience
2+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience
Experience programming with at least one software programming language
3+ years of hands-on post-silicon validation or system validation engineering experience
Strong programming skills (Python, Lua, C/C++, Rust) for production-quality test code
Experience developing and executing validation test plans for complex SoCs, CPUs, or accelerators
Hands-on lab experience with hardware bring-up and debug equipment
Solid understanding of computer architecture and digital design principles
Proficiency with Linux environments, Git, and SSH
Strong problem-solving skills and ability to debug complex hardware/software issues
Preferred
3+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
Bachelor's degree in computer science or equivalent
Knowledge of AWS or cloud technologies
Experience building automated test frameworks and CI/CD pipelines
Deep domain expertise in PCIe (Gen4/Gen5/Gen6) or HBM2/HBM3
Experience with ML hardware architectures, neural network accelerators, or GPU validation
Hands-on experience with emulation platforms (Palladium, Zebu, Veloce)
Firmware development experience (BIOS, BMC, drivers)
Experience with EDA simulation tools and SystemVerilog/UVM testbenches
Track record of leading validation efforts and mentoring engineers
Highly motivated self-starter comfortable with ambiguity and fast-paced environments
A systems thinker who understands the full validation lifecycle—from RTL simulation and emulation test bench development through silicon failure analysis and debug.