About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Responsibilities
Own the bringup and New Product Introduction (NPI) phases to enable custom silicon products, validating ASIC subsystems such as boot, PCIe, memory (e.g., HBM, SRAM), compute cores, and power.\nDesign, develop, operate, and maintain detailed validation tests and test plans in coordination with cross-functional architecture, design, and software teams.\nPerform system characterization, qualification, and debugging to root-cause failures across both pre-silicon prototyping platforms and post-silicon production.\nProvide feedback to improve critical features like power management quality, performance, and reliability through successive generations of designs.\nPartner with customers, systems, manufacturing, diagnostics, and vendor teams to resolve issues and eliminate failures by "shifting left" in the production and deployment lifecycle.
Qualifications
Minimum
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.\n8 years of experience with hardware engineering, ASIC digital design, design validation, test planning, and test design.
Preferred
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.\nExperience with silicon validation, New Product Introduction (NPI), and the bring-up, characterization, and qualification of custom silicon.\nExperience collaborating with cross-functional systems, hardware, manufacturing, and vendor teams to drive the bring-up, qualification, and deployment of custom silicon.\nExperience with platform accelerators, high-speed ASIC interfaces, compute, memory systems (e.g. HBM), Design for Testing, and power system features for high-power SoCs.