About the job
The AI Silicon Engineering (AISiE) SoC Design Verification team is seeking passionate, driven, and intellectually curious silicon verification engineers who can work with cross-discipline teams (including systems, firmware, architecture, design, validation, and product engineering) to develop environment and test cases to verify Microsoft’s latest AI accelerators. We are looking for a Principal Design Verification Engineer to join the team.
Responsibilities
Creation of complex verification environments and tests, with UVM/SystemVerilog and some C++, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation.
Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification.
Create and drive test-plans and test development to provide complete features coverage.
Adoption of latest AI methodology using agentic DV workflows such as Co-Pilot.
Develop and implement technical solutions to complex quality and design challenges.
Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage.
Triage and debug testbench, simulation, and emulation fails.
Develop Makefiles and scripts for scalable and efficient verification.
Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment.
Collaborate with teams across sites and geographies.
Qualifications
Minimum
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
Required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.
Required to provide either proof of their country of citizenship or proof of their US residency or other protected status for assessment of eligibility to access export-controlled information.
Preferred
BS/MS in Electrical, Computer or Software Engineering.
9+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
5+ years’ industry experience of chip and/or computer architecture.
5+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl.
CPU or Graphics core verification.
SERDES/Mixed Signal verification.
In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure.
Experience with hardware emulation or FPGAs.
Design experience or ability to write synthesizable code.
Software development experience.