About the job
Microsoft's Hardware Systems organization is developing AI-native silicon and hyperscale systems designed to power the next generation of frontier AI models. The MAIA platform combines custom silicon, high-performance networking, advanced compiler technologies, and large-scale system infrastructure to enable industry-leading AI training and inference. The Platform Systems Engineering (PSE) team is seeking a Sr. AI Accelerator Tools Development Engineer to lead the development of next-generation stress, validation, and performance tooling for MAIA AI accelerator platforms.
Responsibilities
Design and develop scalable stress, performance, and validation frameworks for MAIA AI accelerator platforms.">">Build workload generation infrastructure capable of exercising compute, memory, interconnect, networking, storage, and system-level resources.">">Develop reusable stress tools using PyTorch, Triton, Python, C++, and custom MAIA SDKs.">">Create synthetic and production-inspired workloads that model training and inference behaviors observed in large-scale AI deployments.">">Build automated infrastructure for workload deployment, orchestration, telemetry collection, and result analysis.
Qualifications
Minimum
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.">">4+ years of experience with programming skills in C/C++ and Python, with experience designing and developing production-quality software systems, frameworks, runtimes, or infrastructure.">">4+ years of experience developing, debugging, or optimizing AI workloads for GPUs, AI accelerators, or HPC systems, including experience with PyTorch or comparable AI frameworks and compute-intensive kernels.">">4+ years of experience with accelerator architecture and performance optimization, including compute engines, memory hierarchy, interconnects, runtime systems, performance profiling, bottleneck analysis, and debugging across hardware/software boundaries.
Preferred
Experience with custom AI accelerator SDKs, compiler ecosystems, kernel generation frameworks, or code-generation pipelines, including technologies such as LLVM, MLIR, or Triton.">">Experience developing or optimizing AI training and inference workloads, including LLMs and other large-scale AI models.">">Experience with collective communication libraries, high-performance networking, distributed AI systems, or performance characterization of large-scale AI clusters.">">Experience with CI/CD systems, containerized environments, automated testing, or cloud-scale validation infrastructure.">">Experience working with silicon bring-up or post-silicon validation teams.