About the job
As a Senior RDU System Architect, you'll be a part of the team that turns silicon into shippable systems — SambaRack-class server and rack designs, the scale-up/scale-out fabric that links RDUs together, and the power and cooling envelope that lets dense AI compute run efficiently in a real data hall. You'll set direction across build, buy, and co-design decisions with our hardware partners, write the specifications those partners build to, and stay engaged from architecture definition through bring-up, qualification, and fleet deployment.
Responsibilities
Define the architecture of RDU-based server and rack platforms, translating product and customer requirements into system specifications that engineering teams and vendors can build to.
Architect the scale-up and scale-out interconnect fabric that links RDUs into larger training and inference clusters, choosing topology, switch/NIC hardware, and optics to hit bandwidth and latency targets.
Own the power delivery architecture and the cooling strategy needed to keep dense, multi-socket racks within thermal budget.
Evaluate ODM/OEM and component vendor proposals against SambaNova's system requirements, and decide where to build in-house, buy off the shelf, or co-develop with a partner.
Define the bring-up, validation, and qualification plan for each new platform, including the reliability (RAS) and telemetry targets it needs to hit once deployed.
Partner with the SambaFlow software/compiler team, ML performance, and datacenter operations so system architecture choices actually help the workloads running on top of them.
Qualifications
Minimum
B.S. or M.S. in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
12+ years architecting hardware systems for hyperscale, HPC, or AI/ML infrastructure
Deep, hands-on background in at least one systems domain, such as interconnect, power delivery, thermal/cooling, or mechanical, for large-scale AI accelerator, HPC, or hyperscale systems
Experience owning system architecture at board, rack, or cluster scale, including writing the specs that other engineering teams and vendors build to
A track record of carrying a system through architecture definition, bring-up, and volume production
Direct experience holding external vendors and ODM/OEM partners accountable to a technical specification
Comfortable reasoning across domains that affect each other
A history of making and owning directional calls, and building alignment across engineering and partner teams to support them
Clear technical writing, specs and reviews other teams will build to and rely on
Preferred
Hands-on experience with AI accelerator platforms (RDU, GPU, TPU, or custom ASIC) and the fabrics that scale them up and out
Enough fluency in chip- and package-level design to work as a peer with silicon and packaging architects
Experience standing up a new engineering function, review process, or design practice from scratch