🤖 AI Summary
RF-Edge applications face a fundamental trade-off between computational capability and energy efficiency. Method: This paper introduces a novel analog computing paradigm grounded in the generalized maximum entropy principle and symmetry constraints: it models nonequilibrium mesoscopic dynamics as a message-passing process, wherein the maximum-entropy state intrinsically encodes the target computation—enabling native support for massively parallel correlation and inner-product operations. Contribution/Results: A monolithic RF correlator chip fabricated in 22-nm SOI CMOS achieves unprecedented energy efficiency—2 PetaOPS/W (8-bit) and 0.8 ExaOPS/W (3-bit) at 4 GS/s sampling rate—surpassing state-of-the-art analog accelerators. Experimental validation demonstrates real-time, ultra-low-power performance in practical RF-Edge tasks including spectrum sensing and code-domain communications, establishing a scalable, physics-informed hardware architecture for energy-efficient edge signal processing.
📝 Abstract
In this paper, we demonstrate how the physics of entropy production, when combined with symmetry constraints, can be used for implementing high-performance and energy-efficient analog computing systems. At the core of the proposed framework is a generalized maximum-entropy principle that can describe the evolution of a mesoscopic physical system formed by an interconnected ensemble of analog elements, including devices that can be readily fabricated on standard integrated circuit technology. We show that the maximum-entropy state of this ensemble corresponds to a margin-propagation (MP) distribution and can be used for computing correlations and inner products as the ensemble's macroscopic properties. Furthermore, the limits of computational throughput and energy efficiency can be pushed by extending the framework to non-equilibrium or transient operating conditions, which we demonstrate using a proof-of-concept radio-frequency (RF) correlator integrated circuit fabricated in a 22 nm SOI CMOS process. The measured results show a compute efficiency greater than 2 Peta ($10^{15}$) Bit Operations per second per Watt (PetaOPS/W) at 8-bit precision and greater than 0.8 Exa ($10^{18}$) Bit Operations per second per Watt (ExaOPS/W) at 3-bit precision for RF data sampled at rates greater than 4 GS/s. Using the fabricated prototypes, we also showcase several real-world RF applications at the edge, including spectrum sensing, and code-domain communications.