STLSat---An Improved Tableau for Satisfiability Checking of Signal Temporal Logic Formulas

2026-07-23

AI Summary

Existing tree-based tableau methods for satisfiability checking of bounded discrete-time Signal Temporal Logic (STL) are incomplete, hindering consistency verification and debugging of complex specifications in safety-critical systems. This work proposes the first sound and complete tableau procedure for this problem and implements it in an open-source tool, STLSat. The approach integrates tree-based tableaux with first-order logic reasoning and SMT encoding, enabling not only satisfiability checking but also witness signal generation, logical entailment and equivalence verification, and unsatisfiable core extraction. Experimental results demonstrate that STLSat achieves performance comparable to or better than state-of-the-art tools while preserving theoretical correctness, significantly enhancing the practical verification and debugging of STL specifications.

Abstract

Signal Temporal Logic (STL) is a formalism used to describe temporal properties of real-valued signals in cyber-physical systems. In mission- and safety-critical domains, specifications often consist of large collections of STL formulas, making consistency checking and requirement analysis a major engineering bottleneck. Despite tableau-based satisfiability procedures being a natural solution to solve this problem, we have recently found out that the only existing tree-shaped tableau for bounded discrete-time STL does not provide a sound satisfiability/unsatisfiability verdict for all possible STL formulas. In this paper, we pinpoint the flaw in that procedure and present a new tree-shaped tableau which we prove to be sound and complete for bounded discrete-time STL. On top of this theoretical foundation, we introduce STLSat, an open-source Rust tool that decides the satisfiability of STL formulas, synthesizes concrete witness signals, checks the logical implication and equivalence between specifications, and extracts unsatisfiable cores, allowing users to identify inconsistent subsets of requirements for more effective specification debugging. STLSat also implements enhanced First-Order Logic and Satisfiability Modulo Theories encodings for STL, which allow it to act as a portfolio solver. We evaluate STLSat on an extended benchmark suite (including STL and Mission-time Linear Temporal Logic formulas) that we release publicly. Across the whole benchmark, the portfolio solver matches or outperforms state-of-the-art tools while preserving correctness guaranteed by our sound tableau procedure.

Problem

• Signal Temporal Logic
• satisfiability checking
• tableau method
• bounded discrete-time
• soundness

Innovation

• Signal Temporal Logic
• Tableau method
• Satisfiability checking
• Portfolio solver
• Unsatisfiable core extraction