Long-Term and Short-Term Transistor Aging in Deep Neural Networks: Impact and Mitigation

2026-06-02

AI Summary

This work addresses the vulnerability of deep neural networks (DNNs) to transistor aging in hardware deployments, which can degrade inference accuracy and cause timing violations. It presents the first systematic analysis of the combined impact of long-term and short-term transistor aging on DNN accuracy and innovatively leverages short-term aging mechanisms for hardware Trojan detection. To mitigate these effects, the authors propose an aging-aware retraining methodology that enhances model robustness while reducing reliance on conservative timing margins. Experimental results demonstrate that the proposed approach significantly improves inference accuracy under aging conditions on standard image classification benchmarks and enables more aggressive timing designs, thereby enhancing overall hardware performance.

Abstract

Deep neural networks (DNNs) are used in a variety of real-world applications including, for example, image classification and speech recognition. The inference accuracy of DNN implemented on hardware in integrated circuits (ICs) degrades under phenomena such as transistor aging. Aging slows down the switching speed of transistors, resulting in system-level timing violations due to unsustainable clocks. To maintain reliability for the entire projected lifetime, designers add guardbands to prevent timing violations; however, adding large timing guardbands causes losses in performance (speed or throughput). This chapter provides a detailed discussion of the effects of long-term and short-term transistor aging on DNN inference accuracy. Furthermore, to mitigate aging effects on DNN's accuracy and keep them at bay, a methodology for aging-aware retraining is presented in order to generate a resilient DNN even when aggressive (i.e., smaller than required) guardbands are used. This improves the inference accuracy of the DNNs even in the presence of aging-induced degradation. These effects are discussed in this chapter along with mitigation strategies on a hardware implementation of a DNN for image classification on an off-the-shelf image dataset. The application of short-term aging as an excitation mechanism for the detection of hardware Trojans in integrated circuits is also briefly discussed.

Problem

• transistor aging
• deep neural networks
• inference accuracy
• timing violations
• hardware reliability

Innovation

• transistor aging
• aging-aware retraining
• timing guardband
• DNN robustness
• hardware Trojan detection