🤖 AI Summary
This work proposes a hardware-friendly, multi-width static partitioning floating-point format design based on the golden ratio φ, which automatically allocates exponent and mantissa bit widths for any total bit width N ≥ 4 via a single closed-form rule, achieving a balanced trade-off among precision, implementation efficiency, and mathematical consistency. The key innovations include the first application of the golden ratio to floating-point format design for closed-form determination of exponent width, the introduction of an exact integer identity path derived from Lucas sequences, and the construction of a falsifiable conjecture verification framework. The implementation features an RTL generator spanning GF4 to GF256, a high-precision integer accumulator, and an FPGA codec; on a Xilinx Artix-7 device, GF16 achieves 323 MHz and passes all 35 verification tests. The proposed rule accurately reproduces the exponent widths of nine existing formats and consistently extends them up to GF1024.
📝 Abstract
We present a hardware-oriented description of GoldenFloat (GF), a static-split floating-point family generated by a single closed rule, and three concrete artefacts: (i) an open multi-width RTL generator covering GF4-GF256 with a continuous-integration differential sweep against a correctly-rounded reference; (ii) an integer-backed Lucas-exact accumulator path verified at 500-digit precision for n = 1, ..., 256; and (iii) a GF16 FPGA codec passing a 35-of-35 testbench at 323 MHz on Artix-7 (Xilinx XC7A35T). For each total width N >= 4, the exponent width is e = round((N-1)/phi^2) with fraction f = N-1-e and phi = (1+sqrt(5))/2. The rule reproduces the realised exponent widths of nine formats (9/9) and extends consistently to GF128, GF512, GF1024. The rule is positioned alongside posit, takum, OCP-MX, and the IEEE P3109 multi-width float draft. We make no per-rung accuracy or superiority claim against any of them. The breadth/toolchain-coherence framing is recorded as an open conjecture with a pre-registered falsification path. A falsification ledger (FL-002) records open questions and the experiments that would settle them. An RTL-correctness erratum dated 2026-05-31 is reported; the fabricated TTSKY26b dies carry the defective multiplier portfolio, and the corrected generator is the regeneration baseline.