Sneak Path Current Modeling in Memristor Crossbar Arrays for Analog In-Memory Computing

2025-11-26

AI Summary

Sneak-path currents in memristor crossbar arrays degrade noise margins and reliability, severely hindering analog in-memory computing applications. To address this, we propose a closed-form analytical modeling framework based on the IMEC A14 process, enabling the first rapid, interpretable quantification of sneak-path current and noise margin loss across diverse data patterns and interconnection strategies. The model explicitly captures the coupled dependencies among array size, device on/off ratio, read voltage, and interconnect parameters, facilitating sensitivity analysis and real-time optimization during pre-design stages. Validated against SPICE simulations, the model achieves an average error of <10.9% and accelerates computation by up to 4784× compared to full-circuit simulation. This work delivers the first analytically tractable and engineering-practical modeling tool for high-accuracy, high-efficiency evaluation of in-memory computing architectures.

Technology Category

• Machine Learning: Hardware-aware ML
• Cognitive Modeling & Cognitive Systems: Neural Spike Coding
• Natural Language Processing: Interpretability, Analysis, and Evaluation of NLP Models

Application Category

• Graph Algorithms and Modeling for the Web: Algorithms and analysis for incomplete, noisy, or partially observed Web-related graphs
• User Modeling, Personalization and Recommendation: On-Device user modeling, personalization, and recommendation
• Security and Privacy: Large-scale security measurements

Abstract

Memristor crossbar arrays have emerged as a key component for next-generation non-volatile memories, artificial neural networks, and analog in-memory computing (IMC) systems. By minimizing data transfer between the processor and memory, they offer substantial energy savings. However, a major design challenge in memristor crossbar arrays is the presence of sneak path currents, which degrade electrical performance, reduce noise margins, and limit reliable operations. This work presents a closed-form analytical framework based on IMEC A14 (1.4 nm) Technology for accurately estimating sneak path currents in memristor crossbar arrays. The proposed model captures the interdependence of key design parameters in memristor crossbar arrays, including array size, ON/OFF ratio of memristors, read voltage, and interconnect conditions, through mathematically derived relationships. It supports various practical configurations, such as different data patterns and connection strategies, enabling rapid and comprehensive sneak path current modeling. The sensitivity analysis includes how design parameters influence sneak path current and noise margin loss, underscoring the trade-offs involved in scaling crossbar arrays. Validation through SPICE simulations shows that the model achieves an error of less than 10.9% while being up to 4784 times faster than full circuit simulations. This analytical framework offers a powerful tool for quantitative assessment and pre-design/real-time optimization of memristor-based analog in-memory computing (IMC) architectures.

Problem

• Modeling sneak path currents in memristor crossbar arrays
• Analyzing impact of design parameters on performance degradation
• Enabling fast and accurate assessment for analog in-memory computing

Innovation

• Closed-form analytical framework for sneak path currents
• Captures interdependence of key design parameters mathematically
• Enables rapid modeling and optimization of IMC architectures