Memristor-Based Spiking Neural Network Accelerator for Bio-inspired Interception Task

2026-05-29

AI Summary

This work addresses the von Neumann bottleneck inherent in conventional GPU/CPU-based spiking neural networks (SNNs), which impedes the energy efficiency required for edge intelligence. The authors propose a memristor-based analog SNN accelerator that, for the first time, integrates memristive in-memory synapses with analog integrate-and-fire (IF) neurons, eliminating the need for multi-transistor CMOS synaptic circuits. This design enables a truly asynchronous, event-driven neuromorphic computing architecture. Validated through HSPICE simulations in 45 nm technology and benchmarked against a 5 nm digital SNN implementation, the analog accelerator achieves a mean squared error (MSE) of only 0.004 compared to ideal software simulation on a biomimetic pursuit task, while reducing energy consumption by 12.7× and latency by 1.26× relative to the digital counterpart.

Abstract

Spiking neural networks (SNNs) provide event-driven and low-power computation inspired by biological neural systems, but current implementations rely on von Neumann graphics processing units (GPUs) and central processing units (CPUs) platforms, where memory and computation bottlenecks limit energy efficiency. To address this challenge, this paper proposes an analog memristor-based spiking neural network (SNN) accelerator that integrates in-memory synaptic computation with analog integrate-and-fire (IF) neurons, eliminating multi-transistor CMOS synapse circuits and enabling asynchronous event-driven operation at the 45nm technology node. Additionally, a digital SNN accelerator is designed and optimized at the 5 nm technology node for comparison. The proposed architecture is evaluated using a predator-prey tracking task that emulates pursuit behavior. In this task, the analog SNN accelerator's inference closely matches the ideal software inference with a mean squared error (MSE) of 0.004. HSPICE simulation results show that the proposed analog SNN accelerator achieves 12.7 times lower energy consumption and 1.26 times lower delay compared to the digital baseline, demonstrating the potential of memristor-based neuromorphic circuits for energy-efficient real-time edge intelligence.

Problem

• Spiking Neural Networks
• Memristor
• Neuromorphic Computing
• Energy Efficiency
• Memory-Compute Bottleneck

Innovation

• memristor
• spiking neural network
• in-memory computing
• analog neuromorphic accelerator
• event-driven computation