Temperature-Resilient Analog Neuromorphic Chip in Single-Polysilicon CMOS Technology

2024-12-18

arXiv.org

AI Summary

Neuromorphic analog chips operating in the subthreshold regime suffer from severe temperature-induced drift, significantly degrading classification accuracy. This work presents a temperature-resilient brain-inspired chip fabricated in a single-poly CMOS process, integrating a two-layer analog neural network and custom analog non-volatile memory (NVM) for synaptic weight storage, targeting low-resolution handwritten digit recognition. A novel physics-aware on-chip temperature compensation circuit is introduced, enabling drift-free classification accuracy (fluctuation <2%) across a wide temperature range of 10°C–60°C—without software recalibration or hardware reconfiguration. The chip achieves two orders-of-magnitude higher energy efficiency than digital counterparts while maintaining accuracy parity with the equivalent software neural network. This work establishes a scalable analog implementation paradigm for robust edge-intelligence hardware.

Technology Category

• Machine Learning: Hardware-aware ML
• Cognitive Modeling & Cognitive Systems: Neural Spike Coding
• Computer Vision: Adversarial Attacks & Robustness

Application Category

• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines
• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• Responsible Web: Machine-in-the-loop, human agency and autonomy

Abstract

In analog neuromorphic chips, designers can embed computing primitives in the intrinsic physical properties of devices and circuits, heavily reducing device count and energy consumption, and enabling high parallelism, because all devices are computing simultaneously. Neural network parameters can be stored in local analog non-volatile memories (NVMs), saving the energy required to move data between memory and logic. However, the main drawback of analog sub-threshold electronic circuits is their dramatic temperature sensitivity. In this paper, we demonstrate that a temperature compensation mechanism can be devised to solve this problem. We have designed and fabricated a chip implementing a two-layer analog neural network trained to classify low-resolution images of handwritten digits with a low-cost single-poly complementary metal-oxide-semiconductor (CMOS) process, using unconventional analog NVMs for weight storage. We demonstrate a temperature-resilient analog neuromorphic chip for image recognition operating between 10$^{circ}$C and 60$^{circ}$C without loss of classification accuracy, within 2% of the corresponding software-based neural network in the whole temperature range.

Problem

• Temperature sensitivity in analog neuromorphic chips
• Energy efficiency in analog non-volatile memory usage
• Maintaining accuracy across a wide temperature range

Innovation

• Temperature compensation mechanism for analog circuits
• Single-polysilicon CMOS analog neuromorphic chip
• Analog non-volatile memories for weight storage