🤖 AI Summary
This study addresses the challenges of semantic alignment and tool integration in automating hardware verification, particularly concerning assertion generation, debugging, and formal reasoning. To overcome these limitations, this work proposes a neuro-symbolic hybrid architecture that leverages large language models (LLMs) as core orchestration components. By integrating prompt engineering, retrieval-augmented generation, agentic workflows, and SAT/SMT solver optimization techniques, the proposed framework establishes semantic consistency as a critical breakthrough for automated verification pipelines. Furthermore, this paper systematically reviews the application paradigms of LLMs across the entire hardware verification workflow and empirically validates the effectiveness of the hybrid architecture. Finally, it provides an in-depth analysis of the limitations inherent in current evaluation methodologies and outlines promising directions for future research in AI-driven electronic design automation.
📝 Abstract
Large language models (LLMs) are increasingly being integrated into hardware verification to automate specification interpretation, verification-artifact generation, debugging, formal reasoning, and tool orchestration. This survey provides a systematic review of LLM-assisted hardware functional verification across SystemVerilog assertion generation, stimulus and testbench generation, bug localization and design repair, model checking and equivalence checking, SAT/SMT optimization, and emerging agentic verification workflows. We organize the literature by methodology, verification objective, tool interaction, benchmark, and evaluation criterion, and examine both inference-time techniques--including prompting, retrieval, structured reasoning, and agentic workflows--and training-time adaptation. Across these areas, a common pattern emerges: LLMs are most effective as semantic reasoning, search, and orchestration components embedded within verification-aware workflows, while simulators, formal engines, coverage tools, and solvers provide executable feedback and correctness evidence. However, tool acceptance alone does not establish verification correctness, since assertions, tests, repairs, or proofs may satisfy available checks without faithfully capturing the complete design intent. We therefore identify semantic alignment between specifications and verification evidence, scalable integration with deterministic tools, generalization to unseen designs, and rigorous evaluation of correctness, cost, robustness, and human effort as key challenges. Finally, we discuss emerging directions toward specification-centered, neuro-symbolic, and persistent agentic verification systems that combine LLM flexibility with independently checkable verification evidence.