Integrating Approximate Logic Synthesis into Approximate High-Level Synthesis

2026-09-18

AI Summary

为解决近似高层次综合与逻辑综合缺乏联合优化的问题，提出将两者结合，通过引入细粒度近似提高电路质量，减少硬件成本。

Abstract

Approximate high-level synthesis (HLS) and approximate logic synthesis (ALS) are two techniques for generating approximate circuits. They operate at different granularities. Approximate HLS typically modifies instructions in a control and data flow graph, whereas ALS modifies gates and interconnects in a gate-level netlist. The absence of a unified framework combining these techniques limits the potential for joint optimization. To bridge this gap, we propose to integrate ALS into the flow of approximate HLS. This integration expands the design space of approximate HLS by introducing fine-grained approximation induced by ALS, thereby generating approximate circuits with higher quality. Experimental results show that under the same error bound, our method reduces the hardware cost by 11% on average compared to the state-of-the-art methods.

Problem

• Approximate High-Level Synthesis
• Approximate Logic Synthesis
• Unified Framework
• Joint Optimization

Innovation

• Approximate High-Level Synthesis
• Approximate Logic Synthesis
• Unified Framework
• Fine-Grained Approximation
• Hardware Cost Reduction