🤖 AI Summary
This work addresses the state-space explosion problem in Petri net product lines, where concurrency and configuration variability are tightly coupled, by proposing a symbolic and parameterized approach to construct reachability graphs without exhaustively analyzing every product variant. The method employs a symbolic state encoding tailored to PNPL semantics and a successor-generation mechanism that preserves family-specific properties. It further integrates online merging of equivalent states and selective abstraction to achieve efficient state-space compression. By combining symbolic model checking, feature constraint propagation, and state equivalence checking, the approach significantly reduces both memory consumption and computational time while enabling reachability verification for product lines of realistic scale and retaining full diagnostic capabilities.
📝 Abstract
This paper presents a set of algorithms for computing the reachability graph of Petri Net Product Lines (PNPLs). These algorithms address the combined challenges of concurrency and variability that arise from product-line configurations. The proposed approach integrates symbolic state representations with family-based variability handling to generate a compact, parameterised reachability graph that captures behaviour across all products without exhaustive product enumeration.
The main contributions are threefold. First, we introduce a symbolic state encoding adapted to PNPL semantics. Second, we define a family-preserving successor generation procedure that applies feature constraints during exploration. Third, we propose reduction techniques to mitigate state-space explosion, including on-the-fly merging of equivalent symbolic states and selective abstraction of irrelevant state details. We prove soundness and completeness of the construction with respect to standard per-product semantics and analyse computational complexity.
An implementation integrated into our modelling tool demonstrates substantial savings in memory and time compared with naive product-based exploration, while preserving diagnostic and verification capabilities. The results indicate that the method enables practical reachability analysis for realistically sized product-line models, thereby facilitating verification and design-space exploration in configurable concurrent systems.