Technology Category
Machine Learning: Large Multimodal Models (LMMs)Natural Language Processing: Code Generation / Program Synthesis from Natural LanguageKnowledge Representation and Reasoning: Computational Complexity of Reasoning
Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation
🤖 AI Summary
To address hallucination and omission issues in large language models (LLMs) when performing reversible transformations for hardware logic design, this paper proposes a bidirectional reversible mapping–based LLM verification framework. The method jointly performs forward synthesis (from logic truth tables to HDL code) and backward reconstruction (from HDL back to truth tables), enabling automated error detection and correction via formal logical equivalence checking. It requires no human annotation, supports multi-model collaboration, and ensures lossless semantic fidelity—marking the first explicit integration of reversibility constraints into LLM-driven hardware generation pipelines. Evaluated on a network-on-chip router case study, the framework successfully generated and precisely reconstructed multi-hundred-line HDL implementations. Beyond accelerating development, it proactively identified and resolved logical inconsistencies in the original design specifications.
Technology Category
Application Category
📝 Abstract
We show for invertible problems that transform data from a source domain (for example, Logic Condition Tables (LCTs)) to a destination domain (for example, Hardware Description Language (HDL) code), an approach of using Large Language Models (LLMs) as a lossless encoder from source to destination followed by as a lossless decoder back to the source, comparable to lossless compression in information theory, can mitigate most of the LLM drawbacks of hallucinations and omissions. Specifically, using LCTs as inputs, we generate the full HDL for a two-dimensional network-on-chip router (13 units, 1500-2000 lines of code) using seven different LLMs, reconstruct the LCTs from the auto-generated HDL, and compare the original and reconstructed LCTs. This approach yields significant productivity improvements, not only confirming correctly generated LLM logic and detecting incorrectly generated LLM logic but also assisting developers in finding design specification errors.
Problem
Research questions and friction points this paper is trying to address.
Mitigating hallucinations and omissions in LLMs for invertible problems
Applying LLMs as lossless encoder-decoder for hardware logic design
Generating and verifying HDL code from Logic Condition Tables
Innovation
Methods, ideas, or system contributions that make the work stand out.
LLM as lossless encoder-decoder for invertible problems
Reconstruct source from output to verify correctness
Detect errors in both LLM output and original specifications
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