🤖 AI Summary
This work addresses the real-time classical decoding challenge for multi-logical-qubit lattice surgery operations in surface-code quantum error correction. We propose a spatially parallel sliding-window decoding architecture that partitions physical qubits into overlapping subsets, each assigned a dedicated hardware decoding module to achieve high-throughput, low-latency, and high-fidelity syndrome decoding. Our approach is the first to systematically resolve the parallel decoding configuration problem for general lattice surgery under hardware resource constraints; it further reveals that buffer width must be dynamically optimized according to the physical noise rate to jointly balance decoding accuracy and throughput. Experimental evaluation demonstrates that the architecture satisfies real-time decoding requirements for full-scale, device-level merge patches while preserving logical fault tolerance—establishing a new paradigm for noise-adaptive, scalable quantum decoders.
📝 Abstract
Running quantum algorithms protected by quantum error correction requires a real time, classical decoder. To prevent the accumulation of a backlog, this decoder must process syndromes from the quantum device at a faster rate than they are generated. Most prior work on real time decoding has focused on an isolated logical qubit encoded in the surface code. However, for surface code, quantum programs of utility will require multi-qubit interactions performed via lattice surgery. A large merged patch can arise during lattice surgery — possibly as large as the entire device. This puts a significant strain on a real time decoder, which must decode errors on this merged patch and maintain the level of fault-tolerance that it achieves on isolated logical qubits. These requirements are relaxed by using spatially parallel decoding, which can be accomplished by dividing the physical qubits on the device into multiple overlapping groups and assigning a decoder module to each. We refer to this approach as spatially parallel windows. While previous work has explored similar ideas, none have addressed system-specific considerations pertinent to the task or the constraints from using hardware accelerators. In this work, we demonstrate how to configure spatially parallel windows, so that the scheme (1) is compatible with hardware accelerators, (2) supports general lattice surgery operations, (3) maintains the fidelity of the logical qubits, and (4) meets the throughput requirement for real time decoding. Furthermore, our results reveal the importance of optimally choosing the buffer width to achieve a balance between accuracy and throughput — a decision that should be influenced by the device’s physical noise.