🤖 AI Summary
This work addresses the inefficiency and heavy reliance on manual intervention in debugging counterexamples during formal connectivity verification. To this end, it introduces a novel graph-based perspective and proposes an automated root-cause analysis methodology. By integrating structural and functional dependency graphs generated by formal verification tools with counterexample reports, the approach leverages graph algorithms to classify verification failures and guide them into one of three targeted analysis workflows. This enables precise localization of fault points and provides either actionable repair suggestions or focused prompts for manual inspection. Evaluated on two industrial-scale SoCs, the method reduces debugging time by up to 80%, substantially enhancing debugging efficiency in complex scenarios and establishing the first systematic framework for automated debugging in connectivity verification.
📝 Abstract
Formal connectivity checking offers scalable verification of signal paths in complex SoC designs, but debugging counterexamples remains a manual and time-consuming process. ConnChecker introduces a new graph-based perspective for automating root-cause analysis by integrating formal tool outputs such as structural/functional dependency graphs and counterexamples report. It begins with automatic failure categorization, routing each counterexample to one of three targeted analysis flows. These flows localize failure points and suggest corrective actions or hints for manual inspection. Evaluated on two industrial SoCs, ConnChecker achieved up to 80\% reduction in debugging time, especially for complex cases, demonstrating its scalability and effectiveness across diverse connectivity scenarios.