🤖 AI Summary
Existing circuit representation learning methods rely heavily on graph models tailored for simple And-Inverter Graphs (AIGs), limiting their capacity to capture complex gate-level semantics; while large language models (LLMs) excel at functional understanding, they lack native awareness of netlist structural topology. This work introduces the first netlist foundation model for integrated circuit design. We propose a novel Text-Annotated Graph (TAG) representation that unifies logical expressions and physical attributes as gate-level textual features. Furthermore, we design an RTL-to-layout co-aligned multi-task self-supervised pretraining paradigm, integrating an LLM-based text encoder with a graph Transformer to jointly optimize semantic comprehension, structural learning, and cross-stage alignment. Evaluated on four functional and physical IC design tasks—including logic optimization, timing prediction, placement, and routing—the model consistently outperforms task-specific baselines and state-of-the-art AIG encoders, demonstrating superior representational generality and cross-task transferability.
📝 Abstract
Circuit representation learning has shown promise in advancing Electronic Design Automation (EDA) by capturing structural and functional circuit properties for various tasks. Existing pre-trained solutions rely on graph learning with complex functional supervision, such as truth table simulation. However, they only handle simple and-inverter graphs (AIGs), struggling to fully encode other complex gate functionalities. While large language models (LLMs) excel at functional understanding, they lack the structural awareness for flattened netlists. To advance netlist representation learning, we present NetTAG, a netlist foundation model that fuses gate semantics with graph structure, handling diverse gate types and supporting a variety of functional and physical tasks. Moving beyond existing graph-only methods, NetTAG formulates netlists as text-attributed graphs, with gates annotated by symbolic logic expressions and physical characteristics as text attributes. Its multimodal architecture combines an LLM-based text encoder for gate semantics and a graph transformer for global structure. Pre-trained with gate and graph self-supervised objectives and aligned with RTL and layout stages, NetTAG captures comprehensive circuit intrinsics. Experimental results show that NetTAG consistently outperforms each task-specific method on four largely different functional and physical tasks and surpasses state-of-the-art AIG encoders, demonstrating its versatility.