🤖 AI Summary
Traditional formal verification methods often struggle to achieve full coverage within project timelines due to difficulties in coverage convergence. This work proposes the first formal verification workflow that integrates autonomous AI agents with generative AI, leveraging large language models to automatically analyze coverage gaps and generate corresponding formal properties, thereby establishing a closed-loop automation for coverage analysis and property generation. Evaluated on both open-source and internal designs, the approach significantly improves coverage metrics, with greater gains observed as design complexity increases, demonstrating its effectiveness and scalability.
📝 Abstract
Coverage closure is a critical requirement in Integrated Chip (IC) development process and key metric for verification sign-off. However, traditional exhaustive approaches often fail to achieve full coverage within project timelines. This study presents an agentic AI-driven workflow that utilizes Large Language Model (LLM)-enabled Generative AI (GenAI) to automate coverage analysis for formal verification, identify coverage gaps, and generate the required formal properties. The framework accelerates verification efficiency by systematically addressing coverage holes. Benchmarking open-source and internal designs reveals a measurable increase in coverage metrics, with improvements correlated to the complexity of the design. Comparative analysis validates the effectiveness of this approach. These results highlight the potential of agentic AI-based techniques to improve formal verification productivity and support comprehensive coverage closure.