Fast and Accurate Identification of Hardware Trojan Locations in Gate-Level Netlist using Nearest Neighbour Approach integrated with Machine Learning Technique

📅 2025-01-18
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🤖 AI Summary
Precise hardware Trojan (HT) localization in gate-level netlists remains challenging in multi-party integrated circuit (IC) design due to structural complexity and limited observability. Method: This paper proposes a dual-granularity (graph-level and node-level) HT localization framework integrating k-nearest neighbors (k-NN) and graph neural networks (GNNs), featuring a novel NN-GNN collaborative architecture. It leverages first- and second-order NN models—rather than relying solely on GNNs—for enhanced detection sensitivity and interpretability. Path-based backtracking, principal component analysis (PCA), and decision-tree-based reasoning further improve model transparency. Contribution/Results: The second-order NN achieves 97.7% node-level localization accuracy—significantly outperforming the GNN baseline (79.8%)—and attains 62.8% graph-level accuracy. We uncover a fundamental trade-off between NN order and code coverage, enabling principled hyperparameter selection. Extensive evaluation across three representative multi-party design scenarios demonstrates strong robustness, scalability, and generalizability.

Technology Category

Machine Learning: Hardware-aware MLData Mining & Knowledge Management: Graph Mining, Social Network Analysis & CommunitySearch and Optimization: Learning to Search

Application Category

Graph Algorithms and Modeling for the Web: Graph neural networks and deep learning approaches for Web-related graphsSemantics and Knowledge: Methods to enhance, augment, integrate or synergize semantic models such as knowledge graphs and LLMsSecurity and Privacy: Data transparency and provenance
📝 Abstract
In the evolving landscape of integrated circuit design, detecting Hardware Trojans (HTs) within a multi entity based design cycle presents significant challenges. This research proposes an innovative machine learning-based methodology for identifying malicious logic gates in gate-level netlists. By focusing on path retrace algorithms. The methodology is validated across three distinct cases, each employing different machine learning models to classify HTs. Case I utilizes a decision tree algorithm for node-to-node comparisons, significantly improving detection accuracy through the integration of Principal Component Analysis (PCA). Case II introduces a graph-to-graph classification using a Graph Neural Network (GNN) model, enabling the differentiation between normal and Trojan-infected circuit designs. Case III applies GNN-based node classification to identify individual compromised nodes and its location. Additionally, nearest neighbor (NN) method has been combined with GNN graph-to-graph in Case II and GNN node-to-node in Case III. Despite the potential of GNN model graph-to-graph classification, NN approach demonstrated superior performance, with the first nearest neighbor (1st NN) achieving 73.2% accuracy and the second nearest neighbor (2nd NN) method reaching 97.7%. In comparison, the GNN model achieved an accuracy of 62.8%. Similarly, GNN model node-to-node classification, NN approach demonstrated superior performance, with the 1st NN achieving 93% accuracy and the 2nd NN method reaching 97.7%. In comparison, the GNN model achieved an accuracy of 79.8%. However, higher and higher NN will lead to large code coverage for the identification of HTs.
Problem

Research questions and friction points this paper is trying to address.

Identify Hardware Trojan locations in gate-level netlists
Improve detection accuracy using machine learning techniques
Compare performance of nearest neighbor and GNN methods
Innovation

Methods, ideas, or system contributions that make the work stand out.

Machine learning for Hardware Trojan detection
Nearest Neighbor approach enhances accuracy
Graph Neural Network for node classification
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BMS College of Engineering | SCOPE College of Engineering | Defence Research and Development Organisation
Anindita Chattopadhyay
Anindita Chattopadhyay
BMSCE
VLSIHardware SecurityMachine Learning
S
Siddharth Bisariya
Department of Electrical and Electronics, SCOPE College of Engineering, Bhopal, Madhya Pradesh, India
V
V. K. Sutrakar
Aeronautical Development Establishment, Defence Research and Development Organisation, Bangalore, India