Rethinking PM Crash Consistency in the CXL Era

2025-04-24

AI Summary

CXL’s decoupled and heterogeneous interconnect architecture disrupts traditional persistent memory (PM) crash-consistency models, causing a fundamental semantic gap in persistence guarantees. This paper presents the first systematic analysis of CXL’s impact on PM persistence semantics and proposes a novel persistence design paradigm tailored for disaggregated memory systems. Grounded in this paradigm, we make three key contributions: (1) hardware primitives enabling fine-grained persistence control; (2) a lightweight persistence programming framework that jointly ensures performance and correctness; and (3) a static/dynamic bug detection tool integrating CXL protocol stack semantics with memory consistency modeling. Our approach provides theoretically sound and practically deployable foundations for CXL-PM systems, significantly strengthening crash-consistency assurance while supporting scalable, heterogeneous memory architectures.

Technology Category

• Machine Learning: Hardware-aware ML
• Data Mining & Knowledge Management: Scalability, Parallel & Distributed Systems
• Constraint Satisfaction and Optimization: Distributed CSP/Optimization

Application Category

• User Modeling, Personalization and Recommendation: User privacy protection in personalized systems
• Security and Privacy: Data transparency and provenance
• Systems and Infrastructure for Web, Mobile and WoT: Sustainability and carbon-aware systems for Web, mobile, and WoT

Abstract

Persistent Memory (PM) introduces new opportunities for designing crash-consistent applications without the traditional storage overheads. However, ensuring crash consistency in PM demands intricate knowledge of CPU, cache, and memory interactions. Hardware and software mechanisms have been proposed to ease this burden, but neither proved sufficient, prompting a variety of bug detection tools. With the sunset of Intel Optane comes the rise of Compute Express Link (CXL) for PM. In this position paper, we discuss the impact of CXL's disaggregated and heterogeneous nature in the development of crash-consistent PM applications, and outline three research directions: hardware primitives, persistency frameworks, and bug detection tools.

Problem

• Ensuring crash consistency in Persistent Memory with CXL
• Addressing hardware-software gaps in PM crash consistency
• Developing tools for PM crash consistency bug detection

Innovation

• Hardware primitives for crash consistency
• Persistency frameworks for PM applications
• Bug detection tools for CXL PM