Image processing Application Development on Software Configurable Processor Array

📅 2025-05-11
📈 Citations: 0
✨ Influential: 0
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🤖 AI Summary
This work addresses the poor real-time performance and low energy efficiency of compute-intensive pixel-level operations—such as median filtering and color space conversion—in embedded edge vision applications. We propose a co-optimization methodology based on software-configurable processor (SCP) arrays. Our approach enables, for the first time, real-time median filtering of DVR-standard video streams on a single SCP; furthermore, we introduce a novel inter-processor collaborative execution scheme for color space conversion across an SCP array, overcoming the inflexibility of ASICs and the programming complexity of FPGAs. Through co-design of hardware bitstream compilation, parallel pixel-processing architecture, and on-chip reconfigurable logic, our implementation achieves real-time frame rates for median filtering with 42% lower power consumption, and improves color conversion throughput by 3.8×. Experimental results demonstrate the SCP array’s significant advantages in delivering high-efficiency, highly configurable edge vision computing.

Technology Category

Computer Vision: Learning & Optimization for CVMachine Learning: Learning on the Edge & Model CompressionSearch and Optimization: Mixed Discrete/Continuous Search

Application Category

Systems and Infrastructure for Web, Mobile and WoT: Data management and stream processing for Web, mobile and wireless applicationsEconomics, Online Markets and Human Computation: Economics and fairness of platforms and recommendation systemsSecurity and Privacy: Large-scale security measurements
📝 Abstract
The software configurable processor finds best use in the embedded systems. These processors have onchip logic like FPGA (Field Programmable Gate Array) and thus can be configured to implement custom hardware functionality. The digital computing tasks that need to accelerate in hardware can be compiled down to a configuration file or bit stream that contains the information on how the logic components are configured and wired together. Video and image processing applications perform repeated pixel transformation and thus consume more power and the processing time. Software configurable processor best accelerates such compute intensive applications. This paper mainly focuses on the implementation of an image processing application called median filtering on a single processor and colour conversion algorithm on array of SCPs(Software Configurable Processors). Median filtering result on Digital Video Recorder (DVR) is discussed as a realtime application of SCP.
Problem

Research questions and friction points this paper is trying to address.

Accelerating image processing applications using configurable processors
Implementing median filtering on a single software configurable processor
Optimizing color conversion algorithms on processor arrays for efficiency
Innovation

Methods, ideas, or system contributions that make the work stand out.

Uses software configurable processor array
Implements custom hardware via FPGA logic
Accelerates image processing with median filtering
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