Technology Category
Search and Optimization: Sampling/Simulation-based SearchMachine Learning: Adversarial Learning & RobustnessReasoning under Uncertainty: Stochastic Optimization
GLOVA: Global and Local Variation-Aware Analog Circuit Design with Risk-Sensitive Reinforcement Learning
🤖 AI Summary
Analog/mixed-signal (AMS) circuits suffer significant performance degradation under process, voltage, and temperature (PVT) variations; conventional design flows—relying on manual iteration and extensive statistical simulation—are inefficient and ill-suited to wafer-level device mismatch. This paper proposes an end-to-end robust sizing optimization framework. It introduces a risk-sensitive reinforcement learning formulation to explicitly model reliability boundaries; an integrated Critic network to enhance sample efficiency in policy learning; and a μ–σ statistical evaluation with simulation re-ranking mechanism to accelerate identification of failing designs. The framework supports industrial-scale global/local Monte Carlo analysis and corner-case verification. Experimental results demonstrate, compared to state-of-the-art methods, an 80.5× improvement in sample efficiency and a 76.0× reduction in total design time—substantially accelerating the development of commercially viable, reliable AMS circuits.
Technology Category
Application Category
📝 Abstract
Analog/mixed-signal circuit design encounters significant challenges due to performance degradation from process, voltage, and temperature (PVT) variations. To achieve commercial-grade reliability, iterative manual design revisions and extensive statistical simulations are required. While several studies have aimed to automate variation aware analog design to reduce time-to-market, the substantial mismatches in real-world wafers have not been thoroughly addressed. In this paper, we present GLOVA, an analog circuit sizing framework that effectively manages the impact of diverse random mismatches to improve robustness against PVT variations. In the proposed approach, risk-sensitive reinforcement learning is leveraged to account for the reliability bound affected by PVT variations, and ensemble-based critic is introduced to achieve sample-efficient learning. For design verification, we also propose $mu$-$sigma$ evaluation and simulation reordering method to reduce simulation costs of identifying failed designs. GLOVA supports verification through industrial-level PVT variation evaluation methods, including corner simulation as well as global and local Monte Carlo (MC) simulations. Compared to previous state-of-the-art variation-aware analog sizing frameworks, GLOVA achieves up to 80.5$ imes$ improvement in sample efficiency and 76.0$ imes$ reduction in time.
Problem
Research questions and friction points this paper is trying to address.
Automating analog circuit design to handle PVT variations
Reducing simulation costs for reliability verification
Improving sample efficiency in variation-aware design
Innovation
Methods, ideas, or system contributions that make the work stand out.
Risk-sensitive reinforcement learning for PVT variations
Ensemble-based critic for sample-efficient learning
μ-σ evaluation and simulation reordering for cost reduction
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