🤖 AI Summary
Neural network–based placement generation in chip physical design often fails to guarantee layout legality, necessitating costly post-processing. Method: This paper proposes the first placement generation framework integrating discrete diffusion modeling with white-box, rule-driven optimization. It employs a lightweight, lossless layout representation, tightly couples real-time design rule checking with efficient sampling, and unifies generative synthesis and legalization. Crucially, it embeds interpretable, hard design constraints directly into the discrete diffusion process—eliminating the need for iterative correction. Contribution/Results: Experiments across multiple benchmarks demonstrate 100% compliance with critical design rules (e.g., spacing, density, connectivity), significantly faster generation than state-of-the-art methods, and simultaneous preservation of topological diversity and structural robustness.
📝 Abstract
Recent advancements in layout pattern generation have been dominated by deep generative models. However, relying solely on neural networks for legality guarantees raises concerns in many practical applications. In this paper, we present ool{DiffPattern}-Flex, a novel approach designed to generate reliable layout patterns efficiently. ool{DiffPattern}-Flex incorporates a new method for generating diverse topologies using a discrete diffusion model while maintaining a lossless and compute-efficient layout representation. To ensure legal pattern generation, we employ {an} optimization-based, white-box pattern assessment process based on specific design rules. Furthermore, fast sampling and efficient legalization technologies are employed to accelerate the generation process. Experimental results across various benchmarks demonstrate that ool{DiffPattern}-Flex significantly outperforms existing methods and excels at producing reliable layout patterns.