Formalizing PARITY Circuit Lower Bounds in Lean

📅 2026-09-21
📈 Citations: 0
Influential: 0
📄 PDF
🤖 AI Summary
使用Lean和切换引理形式化Hastad的PARITY下界,证明了对于固定深度d的电路计算PARITY需要指数级大小,并构造了一个多项式大小、对数深度的有界扇入公式家族。
📝 Abstract
We formalize Hastad's PARITY lower bound in Lean using the switching lemma. For every fixed d >= 2, formulas and DAG circuits of computation depth at most d computing PARITY on n inputs require size exp(Omega_d(n^(1/(d-1)))) for all sufficiently large n. This matches the classical upper bound up to constants in the exponent and implies that PARITY is not in nonuniform AC0. We also construct a polynomial-size, logarithmic-depth bounded-fan-in formula family for PARITY, providing a witness to NC1 is not a subset of AC0 for the formalized models. The Lean source code is available at https://github.com/formalcs/circuit-complexity and is checked with Lean 4.33.1 and mathlib 4.33.1.
Problem

Research questions and friction points this paper is trying to address.

PARITY
circuit lower bounds
nonuniform AC0
Innovation

Methods, ideas, or system contributions that make the work stand out.

PARITY lower bound
switching lemma
formalization in Lean
circuit complexity
🔎 Similar Papers
2023-03-27Bulletin of Symbolic LogicCitations: 2