H-Spec: Parallel Speculative Decoding Without a Drafter-Side KV Cache

📅 2026-09-21
📈 Citations: 0
Influential: 0
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🤖 AI Summary
本文提出H-Spec方法,通过混合目标上下文注入和无需额外缓存的方式,解决了并行推测解码中的延迟和内存开销问题,提高了处理速度和吞吐量。
📝 Abstract
Speculative decoding losslessly accelerates large language model inference by having a lightweight draft model predict future tokens for verification by the target model. Recent block diffusion drafters further reduce drafting latency by predicting multiple tokens in parallel. However, existing block drafters project target hidden states at every input position into a separate drafter-side KV cache, incurring per-request memory and KV-write overhead that grow with concurrency; directly reusing target KVs in place removes this cache but fails to sustain draft quality throughout the block. We propose a hybrid target-context injection method that complements direct target KV reuse with target hidden states only at the last input position, requiring no separate drafter-side KV cache. Building on this design, we propose H-Spec, a hybrid Mamba-attention parallel drafter that consumes the two target-context sources through complementary modules. Mamba modules are initialized with projected last-token target hidden states, while attention modules reuse target KVs in place. Despite its recurrent formulation, Mamba's parallel scan allows H-Spec to preserve block-parallel drafting. Across three target models and diverse tasks, H-Spec improves over the best baseline by 5.0--13.3% in mean accepted length and 5.3--12.6% in batch-size-1 inter-token latency speedup. Under concurrent serving, H-Spec consistently achieves higher throughput while maintaining lower KV cache utilization than baselines across evaluated concurrency levels.
Problem

Research questions and friction points this paper is trying to address.

speculative decoding
block drafters
KV cache
target hidden states
concurrency
Innovation

Methods, ideas, or system contributions that make the work stand out.

H-Spec
Hybrid Mamba-attention
Target-context Injection
Block-parallel Drafting
Low KV Cache Utilization
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