Refining Timing Uncertainty from Logical Time Specification to Operation

📅 2026-09-15
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🤖 AI Summary
本文提出了一种基于CCSL的时序规范框架,支持逐步引入时序知识,解决现有形式化方法在迭代时序工程中的局限性。
📝 Abstract
Real-time and cyber-physical systems are developed through successive refinements from abstract requirements to platform deployments. While timing knowledge evolves throughout this process, existing stochastic real-time formalisms typically require uncertainty to be embedded from the outset or necessitate model reconstruction when new timing information becomes available, hindering iterative timing engineering. This paper presents a refinement-oriented timing specification framework built upon the Clock Constraint Specification Language (CCSL). It supports the progressive introduction of timing knowledge across three levels: logical timing relations, quantitative real-time constraints, and stochastic timing models. Instead of altering behavioural semantics, stochastic information is attached directly to timing quantities as a refinement. This enables implementation measurements and operational observations to be incorporated incrementally within a unified declarative framework. We implement our approach in an OCaml-based simulation tool and evaluate it on a simplified but representative Software-Defined Vehicle use case.
Problem

Research questions and friction points this paper is trying to address.

timing uncertainty
refinement
real-time systems
cyber-physical systems
CCSL
Innovation

Methods, ideas, or system contributions that make the work stand out.

refinement-oriented timing specification
Clock Constraint Specification Language (CCSL)
incremental incorporation of timing knowledge
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