VPR-Evolve: Multi-Agent-Driven Algorithm Evolution for FPGA Place and Route

2026-07-27

AI Summary

This work addresses the limitations of conventional FPGA placement and routing tools, which rely on fixed algorithms and struggle to adapt to diverse circuit structures and timing requirements, often hitting performance ceilings despite hyperparameter tuning. To overcome this, the authors propose a multi-agent framework that integrates large language models with code-level evolutionary optimization to automatically customize the open-source VPR engine. Agents collaboratively evolve the source code through shared memory and iteratively refine it using a full compilation and evaluation pipeline, optimizing a weighted composite metric encompassing critical path delay, wirelength, and runtime. Evaluated on the VTR-9 benchmark suite, the approach achieves up to a 2.7% improvement in overall score, a 9.8% reduction in critical path delay, an 18.1% decrease in wirelength, and a 79.3% speedup in runtime compared to the original VPR.

Abstract

CAD tools typically apply the same fixed, hand-designed algorithms across circuits with widely different structural and timing characteristics. A common way to specialize these one-size-fits-all flows to a target design is to tune the CAD tool's hyperparameters. However, hyperparameter tuning can only select among behaviors already implemented by the fixed algorithm, limiting the achievable quality of results while requiring many expensive place-and-route evaluations. We present VPR-Evolve, a multi-agent framework that specializes Versatile Place and Route (VPR), the open-source FPGA pack-place-and-route engine in the Verilog-to-Routing (VTR) flow, by evolving its source code for each design. VPR-Evolve uses LLM agents to propose, implement, and evaluate code-level modifications, while a shared memory records prior outcomes and guides subsequent evolution. Every candidate is evaluated through a complete VPR build and run, directly optimizing a composite score measured as a weighted function of critical-path delay (CPD), routed wirelength (WL), and tool runtime (RT). Across five VTR-9 benchmark circuits, VPR-Evolve improves the composite score by up to 2.7% over stock VPR in VTR-9. Relative to stock VPR, it reduces CPD by up to 9.8%, routed WL by up to 18.1%, and tool RT by up to 79.3%. VPR-Evolve reduces CPD by up to 6.0%, routed WL by up to 2.2%, and tool RT by up to 7.8% compared with a hyperparameter-tuning baseline.

Problem

• FPGA place and route
• algorithm specialization
• CAD tool optimization
• hyperparameter tuning
• quality of results

Innovation

• multi-agent evolution
• LLM-driven code modification
• FPGA place-and-route optimization
• algorithm specialization
• VPR-Evolve