SAFE-SiP: Secure Authentication Framework for System-in-Package Using Multi-party Computation

2025-05-13

AI Summary

In chiplet-based heterogeneous integration, multi-vendor SiP assembly introduces zero-trust security challenges—including counterfeiting, overproduction, and signature leakage—where existing solutions rely on trusted integrators or dedicated secure chips, suffering from single-point trust dependencies and new attack surfaces. This paper proposes the first MPC-based framework for zero-trust authentication at the SiP level, integrating garbled circuits with lightweight cryptographic protocols to enable privacy-preserving integrity verification of chiplet signatures—without requiring a trusted integrator or exposing raw signatures. Evaluated across five RISC-V SiP designs, the framework incurs only 3.05% average area overhead, negligible power consumption, and achieves computational security of 2¹⁹². It thus delivers high security, minimal hardware cost, and strong scalability for heterogeneous chiplet ecosystems.

Technology Category

• Machine Learning: Hardware-aware ML
• Philosophy and Ethics of AI: Privacy & Security
• Computer Vision: Other Foundations of Computer Vision

Application Category

• Security and Privacy: Data transparency and provenance
• Systems and Infrastructure for Web, Mobile and WoT: Sustainability and carbon-aware systems for Web, mobile, and WoT
• Semantics and Knowledge: Provenance, trust, security and privacy, and ethical issues in managing semantic data

Abstract

The emergence of chiplet-based heterogeneous integration is transforming the semiconductor, AI, and high-performance computing industries by enabling modular designs and improved scalability. However, assembling chiplets from multiple vendors after fabrication introduces a complex supply chain that raises serious security concerns, including counterfeiting, overproduction, and unauthorized access. Current solutions often depend on dedicated security chiplets or changes to the timing flow, which assume a trusted SiP integrator. This assumption can expose chiplet signatures to other vendors and create new attack surfaces. This work addresses those vulnerabilities using Multi-party Computation (MPC), which enables zero-trust authentication without disclosing sensitive information to any party. We present SAFE-SiP, a scalable authentication framework that garbles chiplet signatures and uses MPC for verifying integrity, effectively blocking unauthorized access and adversarial inference. SAFE-SiP removes the need for a dedicated security chiplet and ensures secure authentication, even in untrusted integration scenarios. We evaluated SAFE-SiP on five RISC-V-based System-in-Package (SiP) designs. Experimental results show that SAFE-SiP incurs minimal power overhead, an average area overhead of only 3.05%, and maintains a computational complexity of 2^192, offering a highly efficient and scalable security solution.

Problem

• Securing chiplet-based systems against counterfeiting and unauthorized access
• Eliminating trust assumptions in System-in-Package integrators
• Providing efficient authentication without dedicated security chiplets

Innovation

• Uses Multi-party Computation for zero-trust authentication
• Garbles chiplet signatures to block unauthorized access
• Eliminates need for dedicated security chiplet