AnalogXpert: Automating Analog Topology Synthesis by Incorporating Circuit Design Expertise into Large Language Models

📅 2024-12-17
🏛️ arXiv.org
📈 Citations: 2
✨ Influential: 1
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🤖 AI Summary
Analog circuit topology synthesis faces two key challenges: existing methods rely on imprecise specifications, neglect engineering constraints, and oversimplify design as graph or code generation—divorcing it from real expert decision-making. This paper introduces the first practical, LLM-driven topology synthesis framework: it embeds domain expertise into large language models, leverages a measured SPICE subcircuit library as primitives, and performs end-to-end topology generation via stepwise block selection, interconnection, chain-of-thought guidance, and iterative SPICE-level validation and correction. Key contributions include: (1) the first formalization of authentic analog design workflow as an LLM agent behavior; (2) construction of the first high-quality benchmark comprising 30 measured circuit cases; and (3) introduction of SPICE-native representation and subcircuit-constrained search. Our method achieves 40% success rate on synthetic data and 23% on real-world data—substantially outperforming GPT-4o (3% and 3%, respectively).

Technology Category

Machine Learning: Large Multimodal Models (LMMs)Search and Optimization: Sampling/Simulation-based SearchCognitive Modeling & Cognitive Systems: Analogy

Application Category

Graph Algorithms and Modeling for the Web: Foundation models and LLMs for Web-related graphsEconomics, Online Markets and Human Computation: Cost models of using LLMs in production systemsUser Modeling, Personalization and Recommendation: Large Language Models (LLM) for user modeling and recommendation
📝 Abstract
Analog circuits are crucial in modern electronic systems, and automating their design has attracted significant research interest. One of major challenges is topology synthesis, which determines circuit components and their connections. Recent studies explore large language models (LLM) for topology synthesis. However, the scenarios addressed by these studies do not align well with practical applications. Specifically, existing work uses vague design requirements as input and outputs an ideal model, but detailed structural requirements and device-level models are more practical. Moreover, current approaches either formulate topology synthesis as graph generation or Python code generation, whereas practical topology design is a complex process that demands extensive design knowledge. In this work, we propose AnalogXpert, a LLM-based agent aiming at solving practical topology synthesis problem by incorporating circuit design expertise into LLMs. First, we represent analog topology as SPICE code and introduce a subcircuit library to reduce the design space, in the same manner as experienced designers. Second, we decompose the problem into two sub-task (i.e., block selection and block connection) through the use of CoT and incontext learning techniques, to mimic the practical design process. Third, we introduce a proofreading strategy that allows LLMs to incrementally correct the errors in the initial design, akin to human designers who iteratively check and adjust the initial topology design to ensure accuracy. Finally, we construct a high-quality benchmark containing both real data (30) and synthetic data (2k). AnalogXpert achieves 40% and 23% success rates on the synthetic dataset and real dataset respectively, which is markedly better than those of GPT-4o (3% on both the synthetic dataset and the real dataset).
Problem

Research questions and friction points this paper is trying to address.

Automating analog circuit topology synthesis using LLMs
Addressing misalignment between research and practical design requirements
Incorporating circuit expertise to improve design accuracy and efficiency
Innovation

Methods, ideas, or system contributions that make the work stand out.

Incorporates circuit design expertise into LLMs
Represents analog topology as SPICE code
Uses proofreading strategy for error correction
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School of Integrated Circuits, Peking University, Beijing, China
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Runsheng Wang
School of Integrated Circuits, Peking University, Beijing, China; Institute of EDA, Peking University, Wuxi, China; Beijing Advanced Innovation Center for Integrated Circuits, Beijing, China
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