CRYPTONITE: Scalable Accelerator Design for Cryptographic Primitives and Algorithms

2025-05-20

AI Summary

To address the challenges of code bloat, suboptimal performance, and correctness assurance in hardware implementations of C-language cryptographic primitives under stringent resource and latency constraints, this paper proposes a two-stage automated synthesis framework. First, it identifies synthesizable hardware structures via formal-verification-driven rewriting; second, it generates compact designs through resource-reuse optimization targeting critical-path latency reduction. The framework integrates high-level synthesis (HLS), the Fiat Cryptography verification library, and customized synthesis policies, enabling scalable accelerator sizing. Evaluated on representative primitives—including elliptic-curve cryptography—the approach achieves up to 88.88% reduction in logic resources and 54.31% decrease in critical-path latency compared to conventional HLS-based methods, while formally guaranteeing functional correctness and synthesizability.

Technology Category

• Machine Learning: Hardware-aware ML
• Constraint Satisfaction and Optimization: Satisfiability Modulo Theories
• Knowledge Representation and Reasoning: Automated Reasoning and Theorem Proving

Application Category

• Security and Privacy: Applications of cryptography
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems
• Responsible Web: Data and user privacy-enhancing technologies for the Web

Abstract

Cryptographic primitives, consisting of repetitive operations with different inputs, are typically implemented using straight-line C code due to traditional execution on CPUs. Computing these primitives is necessary for secure communication; thus, dedicated hardware accelerators are required in resource and latency-constrained environments. High-Level Synthesis (HLS) generates hardware from high-level implementations in languages like C, enabling the rapid prototyping and evaluation of designs, leading to its prominent use in developing dedicated hardware accelerators. However, directly synthesizing the straight-line C implementations of cryptographic primitives can lead to large hardware designs with excessive resource usage or suboptimal performance. We introduce Cryptonite, a tool that automatically generates efficient, synthesizable, and correct-by-design hardware accelerators for cryptographic primitives directly from straight-line C code. Cryptonite first identifies high-level hardware constructs through verified rewriting, emphasizing resource reuse. The second stage automatically explores latency-oriented implementations of the compact design. This enables the flexible scaling of a particular accelerator to meet the hardware requirements. We demonstrate Cryptonite's effectiveness using implementations from the Fiat Cryptography project, a library of verified and auto-generated cryptographic primitives for elliptic-curve cryptography. Our results show that Cryptonite achieves scalable designs with up to 88.88% reduced resource usage and a 54.31% improvement in latency compared to naively synthesized designs.

Problem

• Optimizing hardware accelerators for cryptographic primitives
• Reducing resource usage in cryptographic hardware designs
• Improving latency in synthesized cryptographic implementations

Innovation

• Automatically generates efficient hardware accelerators from C code
• Employs verified rewriting for resource reuse optimization
• Explores latency-oriented implementations for scalable designs