🤖 AI Summary
To address the prohibitively high classical compilation and control overhead in quantum dynamical simulation, this work proposes a hardware-assisted Parameterized Circuit Execution (PCE) framework. It is the first to jointly leverage structural equivalence analysis and PCE for the efficient realization of constant-depth time-evolution circuits—specifically those constructed via Cartan decomposition. The method drastically reduces classical processing latency, particularly for many-body models such as the transverse-field XY and Heisenberg spin chains. Experimental results demonstrate up to a 50% reduction in end-to-end runtime. Crucially, this work extends the applicability of PCE beyond its prior restriction to Quantum Characterization, Verification, and Validation (QCVV), establishing a new paradigm for efficient dynamical simulation on near-term Noisy Intermediate-Scale Quantum (NISQ) devices.
📝 Abstract
Improving quantum algorithms run-time performance involves several strategies such as reducing the quantum gate counts, decreasing the number of measurements, advancement in QPU technology for faster gate operations, or optimizing the classical processing. This work focuses on the latter, specifically reducing classical processing and compilation time via hardware-assisted parameterized circuit execution (PCE) for computing dynamical properties of quantum systems. PCE was previously validated for QCVV protocols, which leverages structural circuit equivalencies. We demonstrate the applicability of this approach to computing dynamical properties of quantum many-body systems using structurally equivalent time evolution circuits, specifically calculating correlation functions of spin models using constant-depth circuits generated via Cartan decomposition. Implementing this for spin-spin correlation functions in Transverse field XY (up to 6-sites) and Heisenberg spin models (up to 3-sites), we observed a run-time reduction of up to 50% compared to standard compilation methods. This highlights the adaptability of time-evolution circuit with hardware-assisted PCE to potentially mitigate the classical bottlenecks in near-term quantum algorithms.