FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design

2025-05-28

AI Summary

To address the challenge of fully automated optimization from performance specifications to physical layout in analog circuit design, this paper proposes an end-to-end differentiable framework. First, it introduces a performance-driven joint model comprising a topology classifier and an edge-centered graph neural network (GNN) for high-accuracy topology selection. Second, it develops a differentiable analytical layout cost model—the first of its kind enabling gradient-based optimization under layout constraints. Third, it integrates Cadence Spectre simulation with a large-scale 1M-mmWave-circuit dataset to jointly optimize parameter inference and layout feasibility. Experiments demonstrate a topology classification accuracy exceeding 99%, a relative error in performance prediction below 10%, average design time per instance under one second, and support for 20 expert-defined topologies. The framework significantly enhances both the efficiency and reliability of automated analog circuit design.

Technology Category

• Search and Optimization: Sampling/Simulation-based Search
• Constraint Satisfaction and Optimization: Distributed CSP/Optimization
• Planning, Routing, and Scheduling: Optimization of Spatio-temporal Systems

Application Category

• Graph Algorithms and Modeling for the Web: Foundation models and LLMs for Web-related graphs
• Systems and Infrastructure for Web, Mobile and WoT: Web performance, measurement, and characterization
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems

Abstract

Designing analog circuits from performance specifications is a complex, multi-stage process encompassing topology selection, parameter inference, and layout feasibility. We introduce FALCON, a unified machine learning framework that enables fully automated, specification-driven analog circuit synthesis through topology selection and layout-constrained optimization. Given a target performance, FALCON first selects an appropriate circuit topology using a performance-driven classifier guided by human design heuristics. Next, it employs a custom, edge-centric graph neural network trained to map circuit topology and parameters to performance, enabling gradient-based parameter inference through the learned forward model. This inference is guided by a differentiable layout cost, derived from analytical equations capturing parasitic and frequency-dependent effects, and constrained by design rules. We train and evaluate FALCON on a large-scale custom dataset of 1M analog mm-wave circuits, generated and simulated using Cadence Spectre across 20 expert-designed topologies. Through this evaluation, FALCON demonstrates>99% accuracy in topology inference,<10% relative error in performance prediction, and efficient layout-aware design that completes in under 1 second per instance. Together, these results position FALCON as a practical and extensible foundation model for end-to-end analog circuit design automation.

Problem

• Automates analog circuit design from performance specifications
• Integrates topology selection with layout-constrained optimization
• Addresses parasitic effects and design rules in synthesis

Innovation

• ML framework for automated analog circuit design
• Topology selection via performance-driven classifier
• Layout-constrained optimization using GNN