ELF: Efficient Logic Synthesis by Pruning Redundancy in Refactoring

2025-08-11

AI Summary

In logic synthesis, restructuring operations incur high computational overhead; conventional iterative cut enumeration fails in up to 98% of cases, leading to extensive redundant resynthesis. To address this, we propose a machine learning–based pruning optimization: a classifier is introduced to predict and preemptively prune cuts with high failure probability, significantly reducing unnecessary computation. Our method tightly integrates the classifier into the standard logic synthesis flow without modifying the underlying synthesis engine. Experiments on the EPFL benchmarks and ten large industrial circuits demonstrate an average speedup of 3.9× over the latest ABC implementation. The core innovation lies in shifting failure prediction from a posteriori evaluation to a proactive pruning mechanism—breaking the traditional optimization paradigm while preserving both efficiency and toolchain compatibility.

Technology Category

Machine Learning: OptimizationReasoning under Uncertainty: Stochastic OptimizationConstraint Satisfaction and Optimization: Satisfiability Modulo Theories

Application Category

Economics, Online Markets and Human Computation: Cost models of using LLMs in production systemsSearch and Retrieval-Augmented AI: Web learning to rank, online learning, and counterfactual learning for rankingGraph Algorithms and Modeling for the Web: Algorithms and analysis for incomplete, noisy, or partially observed Web-related graphs

Abstract

In electronic design automation, logic optimization operators play a crucial role in minimizing the gate count of logic circuits. However, their computation demands are high. Operators such as refactor conventionally form iterative cuts for each node, striving for a more compact representation - a task which often fails 98% on average. Prior research has sought to mitigate computational cost through parallelization. In contrast, our approach leverages a classifier to prune unsuccessful cuts preemptively, thus eliminating unnecessary resynthesis operations. Experiments on the refactor operator using the EPFL benchmark suite and 10 large industrial designs demonstrate that this technique can speedup logic optimization by 3.9x on average compared with the state-of-the-art ABC implementation.

Problem

• Reducing high computation demands in logic optimization
• Pruning redundant cuts to avoid unnecessary operations
• Speeding up logic synthesis compared to current methods

Innovation

• Classifier prunes unsuccessful cuts preemptively
• Eliminates unnecessary resynthesis operations
• Speeds up logic optimization significantly