Running hardware-aware neural architecture search on embedded devices under 512MB of RAM

2026-06-12

AI Summary

This work addresses the challenge of deploying neural architecture search (NAS) on embedded devices with less than 512 MB of memory, a key bottleneck limiting TinyML applications in domains such as IoT and wearable robotics. The authors propose a hardware-aware NAS method that natively executes on resource-constrained microcontrollers, automatically designing lightweight convolutional neural networks directly from local data without reliance on external servers. This approach enables, for the first time, on-device, privacy-preserving model customization. Evaluated on the Visual Wake Words human detection task, the method achieves state-of-the-art accuracy in the TinyML domain and demonstrates successful deployment across multiple low-resource embedded platforms, substantially expanding the practical applicability of TinyML.

Abstract

This document proposes a novel approach to hardware-aware neural architecture search (HW NAS) that considers the resources available on the computing platform running it, enabling its execution on various embedded devices. The presented HW NAS produces tiny convolutional neural networks (CNNs) targeting low-end microcontroller units (MCUs), typically involved in the Internet of Things (IoT) or wearable robotics, opening new use cases. A gateway could run it to tailor CNNs' architecture on the acquired data without using external servers, ensuring privacy. The proposed technique achieves state-of-the-art results in the human-recognition tasks on the Visual Wake Word dataset, a standard TinyML benchmark, on several embedded devices.

Problem

• hardware-aware neural architecture search
• embedded devices
• TinyML
• convolutional neural networks
• microcontroller units

Innovation

• hardware-aware neural architecture search
• embedded devices
• TinyML
• microcontroller units
• on-device learning