Reliability of Capacitive Read in Arrays of Ferroelectric Capacitors

2025-06-11

AI Summary

Non-destructive capacitance readout for HfO₂-based ferroelectric capacitors (FeCaps) in crossbar arrays faces critical challenges: substantial device variability, difficulty balancing read yield with disturbance suppression, and susceptibility to bit flips. This work proposes a device–circuit co-optimization (DTCO) framework, introducing— for the first time—the integration of experimentally calibrated physics-based compact modeling with Monte Carlo statistical simulation for reliability assessment, extended to security-oriented threat modeling and hardening. By quantifying the impact of variability on read failure rate, we derive manufacturable read macro design guidelines. The resulting solution achieves robust readout with >99.9% yield and <5% capacitance window disturbance. Its resilience is validated in security-critical applications, including physically unclonable functions (PUFs).

Technology Category

• Machine Learning: Hardware-aware ML
• Computer Vision: Learning & Optimization for CV
• Constraint Satisfaction and Optimization: Distributed CSP/Optimization

Application Category

• Security and Privacy: Large-scale security measurements
• Systems and Infrastructure for Web, Mobile and WoT: Energy management for devices in mobile Web and WoT environments
• Search and Retrieval-Augmented AI: Web evaluation methodologies and metrics

Abstract

The non-destructive capacitance read-out of ferroelectric capacitors (FeCaps) based on doped HfO$_2$ metal-ferroelectric-metal (MFM) structures offers the potential for low-power and highly scalable crossbar arrays. This is due to a number of factors, including the selector-less design, the absence of sneak paths, the power-efficient charge-based read operation, and the reduced IR drop. Nevertheless, a reliable capacitive readout presents certain challenges, particularly in regard to device variability and the trade-off between read yield and read disturbances, which can ultimately result in bit-flips. This paper presents a digital read macro for HfO$_2$ FeCaps and provides design guidelines for capacitive readout of HfO$_2$ FeCaps, taking device-centric reliability and yield challenges into account. An experimentally calibrated physics-based compact model of HfO$_2$ FeCaps is employed to investigate the reliability of the read-out operation of the FeCap macro through Monte Carlo simulations. Based on this analysis, we identify limitations posed by the device variability and propose potential mitigation strategies through design-technology co-optimization (DTCO) of the FeCap device characteristics and the CMOS circuit design. Finally, we examine the potential applications of the FeCap macro in the context of secure hardware. We identify potential security threats and propose strategies to enhance the robustness of the system.

Problem

• Reliable capacitive readout in HfO2 ferroelectric capacitor arrays
• Addressing device variability and read yield-disturbance trade-offs
• Enhancing security and robustness in FeCap macro applications

Innovation

• Digital read macro for HfO2 FeCaps
• Physics-based compact model with Monte Carlo
• Design-technology co-optimization for reliability