Energy Efficient Knapsack Optimization Using Probabilistic Memristor Crossbars

2024-07-05

arXiv.org

AI Summary

Edge computing demands low-latency, energy-efficient solutions for complex combinatorial optimization—particularly for realistic knapsack problems featuring dense non-binary representations and intrinsic self-feedback instability. Method: We propose the Random Competitive Ising (RaCI) heuristic, specifically designed for such problems, and implement it via hardware-software co-design on a production-grade CMOS-integrated probabilistic analog memristor crossbar array—enabling in-situ analog-domain optimization. Contribution/Results: RaCI overcomes structural limitations of von Neumann architectures and annealing-based approaches (e.g., quantum/simulated annealing), supporting native analog computation. Experimental evaluation demonstrates >10⁴× improvement in energy efficiency over state-of-the-art digital processors and quantum annealers, while enabling real-time, ultra-low-power solving of dense non-binary knapsack instances. This work establishes a scalable, compute-in-memory paradigm for edge intelligence optimization.

Technology Category

• Search and Optimization: Mixed Discrete/Continuous Search
• Machine Learning: Hardware-aware ML
• Constraint Satisfaction and Optimization: Mixed Discrete/Continuous Optimization

Application Category

• Economics, Online Markets and Human Computation: Research challenges in human and human-AI computation
• Graph Algorithms and Modeling for the Web: Algorithms and analysis for incomplete, noisy, or partially observed Web-related graphs
• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines

Abstract

Constrained optimization underlies crucial societal problems (for instance, stock trading and bandwidth allocation), but is often computationally hard (complexity grows exponentially with problem size). The big-data era urgently demands low-latency and low-energy optimization at the edge, which cannot be handled by digital processors due to their non-parallel von Neumann architecture. Recent efforts using massively parallel hardware (such as memristor crossbars and quantum processors) employing annealing algorithms, while promising, have handled relatively easy and stable problems with sparse or binary representations (such as the max-cut or traveling salesman problems).However, most real-world applications embody three features, which are encoded in the knapsack problem, and cannot be handled by annealing algorithms - dense and non-binary representations, with destabilizing self-feedback. Here we demonstrate a post-digital-hardware-friendly randomized competitive Ising-inspired (RaCI) algorithm performing knapsack optimization, experimentally implemented on a foundry-manufactured CMOS-integrated probabilistic analog memristor crossbar. Our solution outperforms digital and quantum approaches by over 4 orders of magnitude in energy efficiency.

Problem

• Solving computationally hard knapsack optimization problems
• Addressing dense non-binary representations in real-world applications
• Achieving energy-efficient optimization with memristor crossbars

Innovation

• Probabilistic memristor crossbars for optimization
• Randomized competitive Ising-inspired algorithm
• CMOS-integrated analog memristor crossbar implementation