RISC-V for HPC: An update of where we are and main action points

📅 2025-06-18
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🤖 AI Summary
This work systematically identifies key bottlenecks and ecosystem gaps hindering RISC-V’s adoption in high-performance computing (HPC), including insufficient floating-point performance, limited vectorization support, constrained memory bandwidth, and poor scalability for large-scale parallel workloads. To address these challenges, the study introduces the first cross-vendor, full-stack HPC suitability analysis framework—developed under the RISC-V HPC Special Interest Group—covering critical dimensions: ISA extensions (e.g., V, Zfa, Zfh), compiler optimizations (LLVM/GCC), MPI and OpenMP runtime compatibility, interconnect integration, and accelerator co-design. Based on this comprehensive assessment, the paper delivers the inaugural RISC-V HPC prioritized action roadmap and a concrete, implementable technical攻坚 (technical攻坚 translated as “technical攻坚”) list—spanning hardware enhancements, software toolchain improvements, and system-level integration strategies. The framework establishes an authoritative benchmark and practical guidance for coordinated hardware-software evolution toward production-ready RISC-V HPC systems.

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📝 Abstract
This extended abstract is submitted on behalf of the RISC-V HPC SIG who have been undertaking an analysis to explore the current state and limitations of the RISC-V ecosystem for HPC. Whilst it is right to celebrate that there has been great progress made in recent years, we also highlight limitations and where effort should be focussed.
Problem

Research questions and friction points this paper is trying to address.

Assessing RISC-V ecosystem state for HPC
Identifying current RISC-V HPC limitations
Prioritizing focus areas for RISC-V HPC
Innovation

Methods, ideas, or system contributions that make the work stand out.

RISC-V ecosystem analysis for HPC
Identifying current limitations and progress
Focusing efforts on key action points
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