DRC-Aid: Design-Rule Correction via Agentic Framework utilizing Inference-Time Large Language Models

📅 2026-07-23
📈 Citations: 0
Influential: 0
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🤖 AI Summary
This work addresses the heavy reliance on manual intervention in repairing design rule violations (DRVs) in integrated circuit layouts by proposing the first agent framework that integrates a large language model (LLM) into a closed-loop physical verification system. The approach combines a deterministic rule engine to generate constrained geometric edit operations with an LLM that makes context-aware decisions based on local layout geometry. Efficient exploration of repair paths is achieved through depth-first search, backtracking, and global memory, ensuring electrical topology equivalence while automating corrections. Evaluated on FreePDK45, the method successfully produces DRC-clean and LVS-equivalent fixes in 92.5% of test cases, reducing total violations by 98%. The LLM-driven strategy substantially outperforms random (54.4%) and heuristic (83.3%) baselines, demonstrating particular strength in complex, multi-violation scenarios.
📝 Abstract
Resolving Design Rule Violations (DRVs) in layouts entails an iterative loop of geometric edits and verification. We present DRC-Aid, a closed-loop agentic framework that automates local DRC repair by formulating it as verification-in-the-loop search. To constrain the combinatorial geometric repair space, a deterministic Rule Engine converts physical verification tool-reported violations into a bounded menu of geometric edits. An off-the-shelf Large Language Model (LLM) evaluates local geometric context to select edits from this menu, with budgeted depth-first search and backtracking. Immediate feedback from verification tools such as Calibre nmDRC/nmLVS enforces geometric compliance and guards against electrical-topology degradation, while a global Memory Bank prevents cyclic re-exploration. Evaluated on FreePDK45 layouts containing DRVs, DRC-Aid achieves DRC-clean, LVS-equivalent repairs in ~92.5% of cases with a ~98% total violation reduction, while residual cases yield partially repaired LVS-equivalent candidates. Under an identical search and verification infrastructure, LLM-based selection outperforms random (54.4%) and deterministic-heuristic (83.3%) policies, with the gap widening on cases with six or more violations.
Problem

Research questions and friction points this paper is trying to address.

Design Rule Violations
DRC Repair
Layout Verification
LVS Equivalence
Geometric Compliance
Innovation

Methods, ideas, or system contributions that make the work stand out.

Design Rule Correction
Agentic Framework
Large Language Model
Verification-in-the-loop
Geometric Repair