Parallelizable Exact Synthesis of Quantum Circuits via Semi-Tensor Product

2026-07-27

AI Summary

Existing exact quantum circuit synthesis methods are hindered by high encoding overhead, limited parallel scalability, and memory bottlenecks. This work introduces semi-tensor product (STP) theory into the field for the first time and proposes a two-stage parallel synthesis framework: it first enumerates undirected partial gate topologies and then independently resolves missing gate directions, leveraging a right-to-left factorization feasibility check to enable efficient exact synthesis of CNOT and phase-polynomial circuits. Experimental results demonstrate a 12.8× parallel speedup on 32 nodes; for small-scale instances, the method outperforms SAT-based baselines by 100–1000×, and achieves better performance on 89% of QASMBench benchmarks, with a median speedup of 1.91×.

Abstract

Exact synthesis is a useful tool in quantum compilation by providing optimal alternative implementations of small circuit shards and is widely used as a circuit re-synthesis optimization kernel. However, existing exact synthesis methods suffer from encoding overhead, poor parallel scalability, and memory bottlenecks. This paper introduces a parallel exact synthesis framework for CNOT and phase polynomial circuits, which is based on the semi-tensor product (STP) theory of matrices. By enumerating undirected partial-gate topologies and solving the missing gate directions separately, we are able to parallelize both stages and achieve a parallel speedup of up to $12.8\times$ with 32 workers on this NP-hard problem. More specifically, for each topology, the circuit semantics are converted into canonical STP formulas, and feasibility is decided by a right-to-left factorization procedure that removes infeasible direction assignments. On randomly generated synthesis targets, STP is typically $100\times-1000\times$ faster than the SAT-based baseline on small instances, and remains competitive for more difficult instances. When integrated in a real-world circuit optimization workflow, our algorithm outperforms the SAT-based approach on 89% of cases in QASMBench, and achieves a median speedup of $1.91\times$.

Problem

• exact synthesis
• quantum circuits
• parallel scalability
• memory bottlenecks
• encoding overhead

Innovation

• semi-tensor product
• parallel exact synthesis
• quantum circuit optimization
• CNOT circuits
• phase polynomial