Combinatorial Multi-Access Coded Caching with Private Caches under Intersecting Index Constraints

📅 2025-06-30
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🤖 AI Summary
This paper investigates coded caching under intersection constraints—i.e., users’ requested file index sets must share a nonempty intersection—to model resource-constrained edge IoT scenarios, such as small private caches accessing a limited shared cache. To address this setting, we propose a centralized coded caching scheme based on combinatorial design: it employs uncoded prefetching, introduces intersection classes and their uniform subclass partitions to establish system parameter feasibility conditions, and constructs a structured delivery scheme yielding an explicit rate–memory trade-off. Leveraging theoretical analysis—including an exponential information-theoretic lower bound under general coding and modeling via multi-access topology—we derive the worst-case achievable rate. Numerical evaluations demonstrate that the proposed scheme significantly outperforms baseline schemes and the newly derived information-theoretic lower bound.

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📝 Abstract
We consider the coded caching system where each user, equipped with a private cache, accesses a distinct r-subset of access caches. A central server housing a library of files populates both private and access caches using uncoded placement. In this work, we focus on a constrained indexing regime, referred to as the intersection class, in which the sets used to index the demands of each user must have a nonempty intersection. This regime models resource-limited IoT scenarios such as edge-assisted IoT systems, where devices with small private caches connect to a small number of shared caches. We provide a necessary and sufficient condition under which the system parameters fall within this intersection class. Under this condition, we propose a centralized coded caching scheme and characterize its rate-memory trade-off. Next, we define a uniform-intersection subclass and establish a condition under which the system belongs to this subclass. Within this subclass, the proposed scheme has a regular structure, with each transmission benefiting the same number of users, and we characterize its rate-memory trade-off. Additionally, we derive an index coding-based lower bound on the minimum achievable worst-case rate under uncoded placement. Finally, we provide numerical comparisons between the rate of the proposed scheme, the new lower bound, and bounds from the original work.
Problem

Research questions and friction points this paper is trying to address.

Optimizing coded caching for private caches under intersecting index constraints
Modeling resource-limited IoT systems with shared and private caches
Characterizing rate-memory trade-offs for intersection class caching schemes
Innovation

Methods, ideas, or system contributions that make the work stand out.

Private and access caches with uncoded placement
Intersection class for constrained indexing regime
Uniform-intersection subclass with regular transmission
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Dhruv Pratap Singh
Dept. of ECE, Indian Institute of Science, Bangalore, KA, India
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Anjana A. Mahesh
Dept. of EE, Indian Institute of Tech., Hyderabad, Telangana, India
B. Sundar Rajan
B. Sundar Rajan
Electrical Communication Engineering Department, Indian Institute of Science
Wireless CommunicationCoding TheoryInformation TheoryNetwork Coding