🤖 AI Summary
Analog circuit design optimization remains inefficient due to high simulation costs, a narrow region of high-quality solutions, and the absence of human-like reasoning capabilities. This work proposes the first actor-critic optimization framework (ACOF) tailored for analog circuit sizing, decoupling the search process into proposal (actor) and evaluation (critic) stages. By integrating circuit simulation feedback, design constraint verification, and an adaptive redirection mechanism, ACOF emulates designer-like iterative reasoning and directed exploration. Experimental results across multiple benchmark circuits demonstrate that ACOF significantly outperforms existing methods, achieving an average improvement of 38.9% in top-10 performance metrics, a 24.7% reduction in average regret, and up to a 70.5% enhancement in figure-of-merit (FoM) for individual circuits.
📝 Abstract
Analog design often slows down because even small changes to device sizes or biases require expensive simulation cycles, and high-quality solutions typically occupy only a narrow part of a very large search space. While existing optimizers reduce some of this burden, they largely operate without the kind of judgment designers use when deciding where to search next. This paper presents an actor-critic optimization framework (ACOF) for analog sizing that brings that form of guidance into the loop. Rather than treating optimization as a purely black-box search problem, ACOF separates the roles of proposal and evaluation: an actor suggests promising regions of the design space, while a critic reviews those choices, enforces design legality, and redirects the search when progress is hampered. This structure preserves compatibility with standard simulator-based flows while making the search process more deliberate, stable, and interpretable. Across our test circuits, ACOF improves the top-10 figure of merit by an average of 38.9% over the strongest competing baseline and reduces regret by an average of 24.7%, with peak gains of 70.5% in FoM and 42.2% lower regret on individual circuits. By combining iterative reasoning with simulation-driven search, the framework offers a more transparent path toward automated analog sizing across challenging design spaces.