Technology Category
Machine Learning: Hardware-aware MLHumans and AI: Other Foundations of Human Computation & AICognitive Modeling & Cognitive Systems: Agent Architectures
HARP: A Taxonomy for Heterogeneous and Hierarchical Processors for Mixed-reuse Workloads
🤖 AI Summary
Hierarchical heterogeneous processors (HHPs) lack a systematic taxonomy and quantitative evaluation framework, particularly for mixed-tensor workloads. Method: We propose HARP—the first architecture taxonomy for HHPs tailored to mixed-tensor workloads—unifying intra-node and cross-depth heterogeneity across multiple granularities. We extend Timeloop to support HHP mapping and co-simulation, develop a customized cost model and hierarchical mapping analysis flow, and enable joint modeling of heterogeneous sub-accelerators. Contribution/Results: Our experimental evaluation quantifies the impact of heterogeneity at different architectural levels on energy efficiency and throughput, revealing fundamental trade-offs in HHP design. HARP provides both theoretical foundations and practical tools to guide architecture selection, co-design, and optimization of AI accelerators under mixed-operator workloads.
Technology Category
Application Category
📝 Abstract
Artificial intelligence (AI) application domains consist of a mix of tensor operations with high and low arithmetic intensities (aka reuse). Hierarchical (i.e. compute along multiple levels of memory hierarchy) and heterogeneous (multiple different sub-accelerators) accelerators are emerging as a popular way to process mixed reuse workloads, and workloads which consist of tensor operators with diverse shapes. However, the space of hierarchical and/or heterogeneous processors (HHP's) is relatively under-explored. Prior works have proposed custom architectures to take advantage of heterogeneity to have multiple sub-accelerators that are efficient for different operator shapes. In this work, we propose HARP, a taxonomy to classify various hierarchical and heterogeneous accelerators and use the it to study the impact of heterogeneity at various levels in the architecture. HARP taxonomy captures various ways in which HHP's can be conceived, ranging from B100 cores with an"intra-node heterogeneity"between SM and tensor core to NeuPIM with cross-depth heterogeneity which occurs at different levels of memory hierarchy. We use Timeloop mapper to find the best mapping for sub-accelerators and also modify the Timeloop cost model to extend it to model hierarchical and heterogeneous accelerators.
Problem
Research questions and friction points this paper is trying to address.
Classify hierarchical heterogeneous accelerators
Study impact of architectural heterogeneity
Optimize mapping for mixed-reuse workloads
Innovation
Methods, ideas, or system contributions that make the work stand out.
Hierarchical heterogeneous accelerators taxonomy
Enhanced Timeloop cost model
Optimized sub-accelerator mapping
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