Nail: Not Another Fault-Injection Framework for Chisel-generated RTL

2025-08-08

AI Summary

Existing Chisel-based fault injection frameworks support only coarse-grained, instruction-level controllability, limiting high-fidelity fault modeling. This paper introduces Nail—the first open-source Chisel framework enabling state-driven, register-level fine-grained fault modeling. Our approach eliminates reliance on precise cycle-accurate timing control via a novel state-aware triggering mechanism; enables dynamic configuration of fault injection conditions at runtime through a software interface—without modifying the device-under-test; and leverages automated RTL-level instrumentation in Chisel to generate co-designed hardware-software interfaces, unifying support for both simulation and FPGA emulation. Evaluated on a RISC-V processor, Nail achieves general-purpose register-level fault modeling with <1% resource overhead, significantly improving fault experiment accuracy, flexibility, and cross-platform compatibility.

Technology Category

• Machine Learning: Hardware-aware ML
• Cognitive Modeling & Cognitive Systems: Conceptual Inference and Reasoning
• Intelligent Robots: State Estimation

Application Category

• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• Security and Privacy: Large-scale security measurements
• User Modeling, Personalization and Recommendation: On-Device user modeling, personalization, and recommendation

Abstract

Fault simulation and emulation are essential techniques for evaluating the dependability of integrated circuits, enabling early-stage vulnerability analysis and supporting the implementation of effective mitigation strategies. High-level hardware description languages such as Chisel facilitate the rapid development of complex fault scenarios with minimal modification to the design. However, existing Chisel-based fault injection (FI) frameworks are limited by coarse-grained, instruction-level controllability, restricting the precision of fault modeling. This work introduces Nail, a Chisel-based open-source FI framework that overcomes these limitations by introducing state-based faults. This approach enables fault scenarios that depend on specific system states, rather than solely on instruction-level triggers, thereby removing the need for precise timing of fault activation. For greater controllability, Nail allows users to arbitrarily modify internal trigger states via software at runtime. To support this, Nail automatically generates a software interface, offering straightforward access to the instrumented design. This enables fine-tuning of fault parameters during active FI campaigns - a feature particularly beneficial for FPGA emulation, where synthesis is time-consuming. Utilizing these features, Nail narrows the gap between the high speed of emulation-based FI frameworks, the usability of software-based approaches, and the controllability achieved in simulation. We demonstrate Nail's state-based FI and software framework by modeling a faulty general-purpose register in a RISC-V processor. Although this might appear straightforward, it requires state-dependent FI and was previously impossible without fundamental changes to the design. The approach was validated in both simulation and FPGA emulation, where the addition of Nail introduced less than 1% resource overhead.

Problem

• Enables state-based fault injection for precise modeling
• Provides runtime software control for fault parameter tuning
• Reduces gap between emulation speed and simulation controllability

Innovation

• State-based fault injection for precise modeling
• Software interface for runtime fault control
• Low resource overhead in FPGA emulation