🤖 AI Summary
This work addresses the challenge of efficiently implementing quantum low-density parity-check (QLDPC) codes on semiconductor spin qubit platforms, which suffer from a lack of non-local connectivity. To overcome this limitation, the authors propose a co-scheduling algorithm for shuttling-based qubit architectures, drawing inspiration from robotic path planning and incorporating syndrome extraction circuits tailored to the platform’s shuttling noise model. This approach represents the first application of co-scheduling to QLDPC code implementation, expanding the feasible shuttling range by 5–10× and improving scheduling efficiency by up to 86% compared to hand-optimized strategies. Moreover, the method achieves logical error rates and coding efficiencies that surpass those of the surface code by several orders of magnitude.
📝 Abstract
Semiconductor spin qubits are a promising platform for large-scale quantum computing, but have yet to take full advantage of the broad class of quantum low-density parity check (QLDPC) codes, which promise high encoding rates and efficient logic but require nonlocal connectivity between physical qubits. In this work, we investigate the implementation of QLDPC codes on a tileable, shuttling-based spin qubit architecture. By tailoring syndrome extraction circuits to the shuttling noise model, we significantly improve on previous surface code proposals and extend the feasible shuttling range of the architecture by 5-10x, enabling the implementation of more complex codes with long-range interactions. Taking inspiration from the field of robotics, we develop a coordinated shuttle scheduling algorithm that supports arbitrary codes and use it to benchmark the logical performance of a variety of promising code families. We find that the optimized schedules are up to 86% faster than hand-optimized schedules for certain code families. Through detailed circuit-level simulations, we identify specific QLDPC codes that improve upon prior surface code implementations by orders of magnitude, increasing encoding efficiency and reducing logical error rates. This work demonstrates the potential of shuttling-based spin qubit hardware platforms for scalable and efficient fault-tolerant quantum computation.