🤖 AI Summary
This work addresses the inaccuracy in hotspot prediction during transient thermal simulation of heterogeneous back-end-of-line (BEOL) structures in 3D chip stacks. To overcome this challenge, the authors propose a transient multiscale thermal analysis framework that extends multiscale homogenization—previously limited to steady-state scenarios—to transient thermal modeling. The method automatically extracts layout structures from GDSII/OASIS files to construct representative volume elements (RVEs), and under the assumption of temperature-independent material properties, it derives homogenized thermal conductivity and volumetric heat capacity, yielding an analytical expression for effective transient thermal conductivity. Validated on a 1 mm × 1 mm SoC model with 5 μm and 10 μm RVEs, the approach accurately captures transient thermal behavior at a time step of dt = 0.001, significantly enhancing the fidelity of thermal modeling for three-dimensional heterogeneous BEOL architectures.
📝 Abstract
Modern package designs make use of technologies such as backside power delivery (BSPD) and 3D stacked chiplets that require accounting for the heterogeneity in back end of the line (BEOL) structures in hot-spot prediction. Multiscale homogenization strategies have been demonstrated to be effective for steady-state simulations, however accurate 3D transient simulations that include BEOL structures remain an open challenge.
In this work, we demonstrate a transient thermal workflow that accounts for the 3D heterogeneous structures in the BEOL for problems with strong- and weak- temporal scale separation under the assumption of temperature independent constitutive properties. Our workflow, based on Bloomfield et. al. 2025, automatically extracts, meshes, and homogenizes thermal properties from GDSII and OASIS files to construct thermal property maps.
Property maps (heat capacity and conductivity) have been generated for a 1 mm by 1 mm SoC-style model die that was constructed with LibreLane for 100 by 100 grids with 5 micron by 5 micron representative volume elements (RVEs), and 50 by 50 grids with 10 micron by 10 micron RVEs. The expressions for a transient effective conductivity are provided and a demonstration of the impact of the transient effects are provided for a single RVE. Finally, transient conductivity maps have been provided for a time integration timestep of dt=0.001.