OmniRouting: A Semantic-Coupled Multimodal Benchmark for Constraint-Aware Spatial Reasoning in PCB Routing

2026-08-05

AI Summary

Current large language models exhibit significant limitations in handling complex PCB routing tasks that must satisfy geometric, topological, and electrical constraints, and there is a lack of evaluation benchmarks grounded in real-world industrial scenarios. To address this gap, this work proposes OmniRouting—the first large-scale reasoning benchmark for PCB routing—comprising 1,681 industrial schematic–layout paired designs that integrate semantic and multimodal information along with joint schematic–layout constraints. The benchmark defines four progressively challenging constraint-aware tasks: geometric routing, design rule compliance, electrical functionality preservation, and tool-augmented agent reasoning, incorporating PCB geometry, component placement, netlists, stackup configurations, and EDA tool interfaces. Experiments reveal substantial deficiencies in existing models regarding path planning, rule adherence, and electrical connectivity. All data, evaluation code, and tool interfaces are publicly released to advance AI-driven PCB design research.

Abstract

Recent large language models (LLMs) have demonstrated remarkable progress in constraint-aware navigation, maze reasoning, and graph reasoning. However, their ability to reason about complex routing problems under strict geometric, topological, and electrical constraints remains largely unexplored, despite routing being one of the most challenging and critical stages of electronic design automation (EDA). To bridge this gap, we introduce OmniRouting, the first large-scale benchmark designed to evaluate LLMs on printed-circuit-board (PCB) routing reasoning under real-world industrial design-rule, manufacturability, and connectivity constraints. OmniRouting contains 1,681 industrial-grade schematic-coupled PCB designs, including board geometries, routable component placements by human engineers, footprints, pad locations, netlists, stackup information, and routing constraints. The benchmark comprises four tasks: (1) geometric routing reasoning, generating physically valid copper traces, vias, and layer assignments to connect circuit nets within constrained board regions; (2) design-rule-aware routing reasoning, producing routable layouts that satisfy clearance, trace-width, via, obstacle-avoidance, and board-boundary constraints; (3) electrical functionality reasoning, preserving schematic-specified connectivity while reasoning over net names and functional roles to produce electrically correct routing; and (4) tool-augmented agentic routing, leveraging external tools for tasks (1)-(3). Our results reveal substantial limitations of current LMMs in PCB routing, including weak path-planning capabilities, poor adherence to design-rule constraints, and inconsistent preservation of electrical functionality. We will open-source all benchmark data, evaluation code, and tool interfaces to facilitate future research.

Problem

• PCB routing
• constraint-aware reasoning
• spatial reasoning
• electronic design automation
• multimodal benchmark

Innovation

• PCB routing
• constraint-aware reasoning
• multimodal benchmark
• large language models
• electronic design automation