π€ AI Summary
This work addresses the limited parallel efficiency of SMT solvers on modern multicore CPU architectures by proposing a general-purpose parallel framework. The approach integrates dynamic binary partitioning guided by VSIDS-based heuristics, CDCL-style core-guided pruning, and online backbone detection, complemented by an on-demand termination mechanism. Implemented within the Z3 solver, the method demonstrates substantial performance gains over both the sequential Z3 and state-of-the-art parallel solvers across six challenging logic benchmarks in the SMT-COMP 2025 Parallel Track, significantly enhancing scalability and solving efficacy.
π Abstract
Exploiting parallelism in modern CPU architectures remains a longstanding challenge in optimizing SMT solvers. We introduce a novel parallel framework that dynamically builds a binary partition tree of the search space by sampling from workers' VSIDS statistics during solving. We leverage the full power of core-based CDCL-style pruning to continuously shrink the partition tree. We further optimize our architecture by incorporating online backbone detection into worker threads, as well as a terminate-on-demand mechanism to eagerly eliminate work on pruned subproblems. The resulting algorithm is highly generalizable and scales effectively with available resources. We implement our approach in the Z3 SMT solver and demonstrate that it outperforms both sequential Z3 and existing state-of-the-art parallel frameworks on challenging benchmarks from six logics in the SMT-COMP 2025 Parallel Track.