OpenOpt: An Open-Source SRAM Optimizer Based on Equivalent Circuit Model

2026-06-08

AI Summary

This work addresses the high simulation cost and low search efficiency in the co-optimization of SRAM architecture and transistor sizing. The authors propose the first open-source co-optimization framework that employs an equivalent circuit model to abstract inactive cells as RC loads and static power models, enabling integration of diverse optimizers—including simulated annealing, particle swarm optimization, variants of Bayesian optimization, and multi-objective evolutionary algorithms such as MOEA/D—within a unified search space. The approach achieves a 61.4× simulation speedup with timing and power errors below 0.22% and 1.68%, respectively. Among the tested methods, MOEA/D yields the best results, significantly improving static noise margin (+6.2%), substantially reducing area (−73.6%), and lowering peak power consumption (−42.3%), thereby demonstrating the complementary benefits of joint architectural and device-level optimization.

Abstract

This paper proposes a co-optimization framework that jointly optimizes SRAM architecture and transistor sizing using equivalent circuit models. The framework simplifies inactive SRAM cells into equivalent RC loads and static power models, achieving up to 61.4$\times$ simulation speedup while maintaining high fidelity (read/write delay error $<$0.22%, power error $<$1.68%). A joint search space encompassing architecture parameters and device sizing integrates seven algorithms including SA, PSO, Bayesian Optimization variants, and multi-objective evolutionary algorithms. Based on FreePDK45, ablation experiments confirm complementary gains from architecture selection and transistor sizing. Among all algorithms, MOEA/D achieves the best Figure of Merit (8.2721), yielding 6.2% improvement in SNM, 73.6% reduction in area, and 42.3% reduction in peak power. The framework is publicly available at https://github.com/W1Y1K1/OpenOpt.

Problem

• SRAM optimization
• transistor sizing
• architecture co-optimization
• equivalent circuit model
• multi-objective optimization

Innovation

• SRAM optimization
• equivalent circuit model
• co-optimization framework
• transistor sizing
• multi-objective evolutionary algorithm